H01L2224/92226

SEMICONDUCTOR DEVICE PACKAGE HAVING THERMAL DISSIPATION FEATURE AND METHOD THEREFOR

A semiconductor device package having a thermal dissipation feature is provided. The semiconductor device package includes a package substrate. A semiconductor die is mounted on a first surface of the package substrate. A thermal conductive structure including a die pad portion is affixed to the semiconductor die. A limb portion of the thermal conductive structure extends laterally away from the die pad portion and overlaps a portion of the package substrate. A thermal conduction path is formed between the semiconductor die and a distal end of the limb portion.

SEMICONDUCTOR DEVICE

A semiconductor device includes a lead frame; a circuit board located on the lead frame; a power device that includes a switching element and is mounted on the circuit board via a bump located between the power device and the circuit board; and a heat releasing member connected to the power device. The circuit board may be a multi-layer wiring board. The circuit board may include a capacitor element, a resistor element, an inductor element, a diode element and a switching element.

Package structures
11211310 · 2021-12-28 · ·

A package structure is provided. The package structure includes a leadframe, a device, first protrusions, second protrusions, a conductive unit, and an encapsulation material. The device includes a substrate, an active layer, first electrodes, second electrodes and a third electrode. The first electrodes have different potentials than the second electrodes. The first electrodes and the second electrodes are arranged so that they alternate with each other. The first protrusions are disposed on each of the first electrodes. The second protrusions are disposed on each of the second electrodes. The first protrusions and the second protrusions are connected to the leadframe. The first side of the conductive unit is connected to the substrate of the device. The conductive unit is connected to the leadframe. The encapsulation material covers the device and the leadframe. The second side of the conductive unit is exposed from the encapsulation material.

DUAL COOL POWER MODULE WITH STRESS BUFFER LAYER

Described implementations provide wireless, surface mounting of at least two semiconductor die on die attach pads (DAPs) of the semiconductor package, where the at least two semiconductor die are electrically connected by a clip. A stress buffer layer may be provided on the clip, and a heatsink may be provided on the stress buffer layer. The heatsink may be secured with an external mold material.

DUAL COOL POWER MODULE WITH STRESS BUFFER LAYER

Described implementations provide wireless, surface mounting of at least two semiconductor die on die attach pads (DAPs) of the semiconductor package, where the at least two semiconductor die are electrically connected by a clip. A stress buffer layer may be provided on the clip, and a heatsink may be provided on the stress buffer layer. The heatsink may be secured with an external mold material.

Dual cool power module with stress buffer layer

Described implementations provide wireless, surface mounting of at least two semiconductor die on die attach pads (DAPs) of the semiconductor package, where the at least two semiconductor die are electrically connected by a clip. A stress buffer layer may be provided on the clip, and a heatsink may be provided on the stress buffer layer. The heatsink may be secured with an external mold material.

Semiconductor Device and Method For Manufacture of Semiconductor Device
20220216135 · 2022-07-07 ·

A semiconductor device includes at least one first semiconductor element having a first electrode, a second semiconductor element having a second electrode, a first lead terminal connected to the first electrode of the at least one first semiconductor element, a second lead terminal connected to the second electrode of the second semiconductor element, a first resin with which the first lead terminal and the second lead terminal are sealed, and a second resin with which the at least one first semiconductor element and the second semiconductor element are sealed.

ELECTRONIC DEVICE FLIP CHIP PACKAGE WITH EXPOSED CLIP

A packaged electronic device includes a multilayer substrate, including a first side, a first layer having a first plurality of conductive structures along the first side, and a second layer having a second plurality of conductive structures, a semiconductor die soldered to a first set of the conductive structures, a conductive clip directly connected to one of the conductive structures of the first layer and to a second side of the semiconductor die, and a package structure that encloses the semiconductor die and a portion of the conductive clip.

Semiconductor device

A semiconductor device includes a lead frame; a circuit board located on the lead frame; a power device that includes a switching element and is mounted on the circuit board via a bump located between the power device and the circuit board; and a heat releasing member connected to the power device. The circuit board may be a multi-layer wiring board. The circuit board may include a capacitor element, a resistor element, an inductor element, a diode element and a switching element.

Embedded package and method thereof

A method of manufacturing an embedded package comprises attaching a plurality of chips on a pre-mold lead frame; forming a first lamination layer on the plurality of chips, the pre-mold lead frame and a plurality of pins; forming a first plurality of vias and a second plurality of vias through the first lamination layer; forming a respective conductive plug of a plurality of conductive plugs by depositing a respective conductive material in each of the first plurality of vias and each of the second plurality of vias; and electrically connecting the plurality of conductive plugs on the electrodes of the plurality of chips to the plurality of conductive plugs on the plurality of pins.