A semiconductor device package includes a semiconductor die having two largest dimensions that define a major plane, a packaging material enclosing the semiconductor die, a plurality of contacts on a first exterior surface of the semiconductor device package that is parallel to the major plane, the first exterior surface defining a bottom of the semiconductor device package, and a pedestal of semiconductor material above the semiconductor die in a thermally-conductive, electrically non-conductive relationship with the semiconductor die. The semiconductor material of the pedestal may be doped to provide electromagnetic shielding of the semiconductor die.

Provided is a semiconductor package and a method of manufacturing the same, wherein in the semiconductor package, an area on a surface of a heat release metal layer pressed by a molding die is expanded and the molding die directly and uniformly compresses an upper substrate and/or a lower substrate, each of which does not include heat release posts so that contamination of a substrate occurring due to a molding resin may be prevented and molding may be stably performed.

Implementations of semiconductor packages may include: a die coupled to a substrate; a housing coupled to the substrate and at least partially enclosing the die within a cavity of the housing, and; a pin fixedly coupled to the housing and electrically coupled with the die, wherein the pin includes a reversibly elastically deformable lower portion configured to compress to prevent a lower end of the pin from lowering beyond a predetermined point relative to the substrate when the housing is lowered to be coupled to the substrate.

This semiconductor device is provided with a device substrate in which a semiconductor circuit including two high frequency amplifiers; a cap substrate and a sealing frame of a conductor which forms and air-tightly seals space surrounding an area, in which the semiconductor circuit is formed, between the device substrate and the cap substrate, wherein the sealing frame is configured as a line of a 90-degree hybrid circuit or a line of a rat-race circuit.

A semiconductor apparatus a semiconductor module including a semiconductor device and a resin section covering the periphery of the semiconductor device, and a cooler arranged below the semiconductor device. The cooler includes a top plate that is attached to a lower surface of the resin section. The resin section has a protrusion protruding downward from an outer peripheral edge of the lower surface of the resin section. The protrusion includes a first straight section extending in a predetermined direction in a plan view of the semiconductor apparatus, and a first curved section having a curved shape convex inward the semiconductor module and being connected to the first straight section. The top plate includes a first notch that is engageable with the protrusion, and the resin section and the top plate are bonded to each other with an adhesive interposed therebetween.

Provided are a semiconductor device and an inverter device with a decrease in yield being suppressed by preventing the adhesive from leaking into the inside of the semiconductor device. A heat sink, a wiring board provided on the heat sink, a semiconductor chip provided on the wiring board, a case housing provided on the heat sink so as to surround the wiring board and the semiconductor chip, an adhesive that adheres a lower surface joint portion of the case housing and an upper surface joint portion of the heat sink, a sealing material that fills the case housing and covers the wiring board and the semiconductor chip, and a convex portion provided on the lower surface joint portion of the case housing or the upper surface joint portion of the heat sink, that separates the adhesive from the sealing material are included.

A semiconductor device, including a sealing body portion, a nut and a bus bar. The sealing body portion has a housing portion formed on a front surface thereof, the sealing body portion including a semiconductor chip contained therein and a plurality of pin-shaped external connection terminals electrically connected to the semiconductor chip. The nut has a screw hole and disposed in the housing portion. The bus bar is arranged opposite the housing portion, and includes a fastening area with an opening portion opposite the screw hole of the nut, and a bonding area that is outside the fastening area and is connected to the plurality of external connection terminals. The sealing body portion has a protrusion adjacent to the bonding area of the bus bar.

A semiconductor module includes: a case; a semiconductor chip provided inside the case; a seal material injected to inside of the case and sealing the semiconductor chip; and a lid provided inside the case and contacting an upper surface of the seal material, wherein a tapered portion is provided at an end portion of the lid on an upper surface side, a gap is provided between a side surface of the end portion of the lid and an inner side surface of the case, and the seal material crawls up to the tapered portion through the gap.

Joining a second supporting member to one surface of a semiconductor chip through an upper layer joining portion includes: forming, on the one surface, a pre-joining layer by pressure-sintering a first constituent member containing a sintering material on the one surface such that spaces between the plurality of protrusions are filled with the pre-joining layer and the pre-joining layer has a flat surface on a side of the pre-joining layer away from the semiconductor chip; arranging, on the flat surface, the second supporting member through a second constituent member containing a sintering material; and heating and pressurizing the second constituent member. Thereby, an upper layer joining portion is formed by the second constituent member and the pre-joining layer.

An integrated circuit package can contain a semiconductor die and provide electrical connections between the semiconductor die and additional electronic components. The integrated circuit package can reduce stress placed on the semiconductor die due to movement of the integrated circuit package due to, for example, temperature changes and/or moisture levels. The integrated circuit package can at least partially mechanically isolate the semiconductor die from the integrated circuit package.