H01L23/3731

Heat spreading layer integrated within a composite IC die structure and methods of forming the same

A heat spreading material is integrated into a composite die structure including a first IC die having a first dielectric material and a first electrical interconnect structure, and a second IC die having a second dielectric material and a second electrical interconnect structure. The composite die structure may include a composite electrical interconnect structure comprising the first interconnect structure in direct contact with the second interconnect structure at a bond interface. The heat spreading material may be within at least a portion of a dielectric area through which the bond interface extends. The heat spreading material may be located within one or more dielectric materials surrounding the composite interconnect structure, and direct a flow of heat generated by one or more of the first and second IC dies.

HEAT SPREADERS WITH INTEGRATED PREFORMS

Embodiments of heat spreaders with integrated preforms, and related devices and methods, are disclosed herein. In some embodiments, a heat spreader may include: a frame formed of a metal material, wherein the metal material is a zinc alloy or an aluminum alloy; a preform secured in the frame, wherein the preform has a thermal conductivity higher than a thermal conductivity of the metal material; and a recess having at least one sidewall formed by the frame. The metal material may have an equiaxed grain structure. In some embodiments, the equiaxed grain structure may be formed by squeeze-casting or rheocasting the metal material.

BACK PLATES TO SUPPORT INTEGRATED CIRCUIT PACKAGES IN SOCKETS ON PRINTED CIRCUIT BOARDS AND ASSOCIATED METHODS
20230022058 · 2023-01-26 ·

Back plates to support integrated circuit packages in sockets on printed circuit boards and associated methods are disclosed. An example back plate includes a ceramic substrate having a first surface and a second surface opposite the first surface. The example back plate further includes metal coupled to the ceramic substrate. At least a portion of the metal is disposed between planes defined by the first and second surfaces of the ceramic substrate.

Thermal Transfer, Management and Integrated Control Structure
20230025988 · 2023-01-26 ·

The present invention includes a method of making a thermal management and signal control structure comprising forming in a substrate heat conductive vias and control vias, power vias, and ground vias, wherein the heat conductive vias and the control vias, power vias, and vias are aligned to a first metal plate on a first side of the substrate, wherein the control vias, power vias, and ground vias are surrounded by a glass layer; forming a second metal plate on a second side of the substrate, wherein the second metal plate is connected to the heat conductive vias; and forming a pad on each of the control vias, power vias, and ground vias, wherein each pad is configured to electrically connect the thermal management and signal control structure to at least one of: a printed circuit board, an integrated circuit, or a power management unit.

Carrier substrate with a thick metal interlayer and a cooling structure

The present invention proposes a carrier substrate (1) for electrical components (13), the carrier substrate (1) having a component side (4) and a cooling side (5) which is opposite the component side (4) and has a cooling structure (30), the carrier substrate (1) comprising a primary layer (10) which faces the component side (4) and is produced from ceramic for electrical insulation, and a secondary layer (20) which faces the cooling side (5) for stiffening the carrier substrate (1), characterized in that a metallic intermediate layer (15) is arranged between the primary layer (10) and the secondary layer (20) for heat transfer from the component side (4) to the cooling side (5), the metallic intermediate layer (15) being thicker than the primary layer (10) and/or the secondary layer (20).

PLATE VAPOR CHAMBER ARRAY ASSEMBLY
20230020152 · 2023-01-19 ·

A plate vapor chamber array assembly with a plurality of plate vapor chambers joined in an array and each chamber having an evaporation area and an evacuated sealed chamber. The plate vapor chambers may be in direct contact with adjacent plate vapor chambers. A vapor chamber clamp surrounding the array has an inner surface engaging an outer edge of at least two of the plate vapor chambers of the array to press a surface of the plate vapor chamber array directly against the heat source.

THERMAL INTERFACE MATERIALS FOR THE INTERIOR, CENTER, AND EXTERIOR OF AN ELECTRONIC COMPONENT
20230223313 · 2023-07-13 ·

The present invention provides thermal interface materials for the interior, center, and exterior of an electronic component, wherein the interior thereof is a first contact interface between an electronic chip and an integrated heat spreader; the center thereof is a second contact interface between the electronic chip and a heatsink; and the exterior thereof is a third contact interface between the integrated heat spreader and the heatsink. The thermal interface material consists of: a first, a second, a third thermal conductive adhesive layer, along with a thin electrically conductive functional layer. The thin electrically conductive functional layer is at least a conductive foil, a conductive foil with a ceramic and/or graphene heat dissipation layer on one side thereof, and a conductive foil with a ceramic and/or graphene heat dissipation layer on two sides thereof; and is laminated between the first and the second thermal conductive adhesive layer.

Fan-out interconnect integration processes and structures

Processing methods may be performed to form a fan-out interconnect structure. The methods may include forming a semiconductor active device structure overlying a first substrate. The semiconductor active device structure may include first conductive contacts. The methods may include forming an interconnect structure overlying a second substrate. The interconnect structure may include second conductive contacts. The methods may also include joining the first substrate with the second substrate. The joining may include coupling the first conductive contacts with the second conductive contacts. The interconnect structure may extend beyond the lateral dimensions of the semiconductor active device structure.

Semiconductor device

A device includes plural semiconductor fins, a gate structure, an interlayer dielectric (ILD) layer, and an isolation dielectric. The gate structure is across the semiconductor fins. The ILD surrounds the gate structure. The isolation dielectric is at least between the semiconductor fins and has a thermal conductivity greater than a thermal conductivity of the ILD layer.

HEAT DISSIPATION MEMBER AND HEAT SINK

A heat dissipation member includes a thermal radiation ceramic material, and the thermal radiation ceramic material contains silicon nitride and boron nitride as main components. The ratio of the mass of boron nitride to the mass of silicon nitride and boron nitride is 10 mass % to 40 mass %.