A semiconductor package of the present invention comprises a base plate, an insulating substrate, and a lead frame, wherein the base plate is made of a metallic material including Cu and Be—Cu. The present invention can ensure bonding reliability and thus prevent performance degradation of semiconductor devices.

The heat-dissipating substrate structure includes a base layer and a cold spray coating layer. The cold spray coating layer is formed on a surface of the base layer. The cold spray coating layer is a film formed on the surface of the base layer by spraying a solid-phase metal powder and a high-pressure compressed gas onto the base layer. The solid-phase metal powder at least includes a film-forming powder with an apparent density of 3 to 4 g/cm.sup.3 and a median particle diameter (D50) of 30 μm or less. A maximum depth of a bottom of the cold spray coating layer embedded in the base layer is less than 60 μm. A cooler contains an internal cooling fin joined to the base layer. An internal coolant passage is defined between the base layer, the internal cooling fin, and an interior of the cooler.

A memory device including a base chip and a memory cube mounted on and connected with the base chip is described. The memory cube includes multiple stacked tiers, and each tier of the multiple stacked tiers includes semiconductor chips laterally wrapped by an encapsulant and a redistribution structure. The semiconductor chips of the multiple stacked tiers are electrically connected with the base chip through the redistribution structures in the multiple stacked tiers. The memory cube includes a thermal path structure extending through the multiple stacked tiers and connected to the base chip. The thermal path structure has a thermal conductivity larger than that of the encapsulant. The thermal path structure is electrically isolated from the semiconductor chips in the multiple stacked tiers and the base chip.

Methods, systems, apparatus, and articles of manufacture to control load distribution of integrated circuit packages are disclosed. An example apparatus includes a heatsink, a base of the heatsink to be thermally coupled to a semiconductor device, and a rigid plate to be coupled to the semiconductor device and the base of the heatsink, the rigid plate stiffer than the base, the rigid plate distinct from a bolster plate to which the heatsink is to be coupled.

Stacked semiconductor die assemblies with multiple thermal paths and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die assembly can include a plurality of first semiconductor dies arranged in a stack and a second semiconductor die carrying the first semiconductor dies. The second semiconductor die can include a peripheral portion that extends laterally outward beyond at least one side of the first semiconductor dies. The semiconductor die assembly can further include a thermal transfer feature at the peripheral portion of the second semiconductor die. The first semiconductor dies can define a first thermal path, and the thermal transfer feature can define a second thermal path separate from the first semiconductor dies.

The present disclosure generally relates to a computer circuit board having an integrated voltage regulator assembly that may include a heat sink and at least one voltage regulator module board. The heat sink may have a metal plate with at least one recess in which the voltage regulator module board may be attached. The voltage regulator module board is electrically coupled to a semiconductor package and the heat sink is thermally coupled to the semiconductor package. The computer circuit board is used in high-performance computing devices including computer workstations and computer servers.

A flip chip circuit comprising: a semiconductor substrate; a power amplifier provided on the semiconductor substrate; and a metal pad configured to receive an electrically conductive bump for connecting the flip chip to external circuitry. At least a portion of the power amplifier is positioned directly between the metal pad and the semiconductor substrate.

The present disclosure is directed to a semiconductor device and a manufacturing method thereof, which relate to the field of semiconductor technologies. The semiconductor device includes a fin ESD element. The method includes: providing a substrate structure, where the substrate structure includes a semiconductor substrate, and a semiconductor fin for the fin ESD element and an electrode structure surrounding a part of the semiconductor fin that are on the semiconductor substrate; forming a second dielectric layer on the substrate structure to cover the electrode structure; forming, in the second dielectric layer, a trench extending to a top of the electrode, where the trench is on the electrode and extends along a longitudinal direction of the electrode, and a transverse width of the trench is less than or equal to a transverse width of the top of the electrode; and filling the trench with a metal material, so as to form a metal heat sink that is on the top of the electrode and is coupled to the electrode. With the present disclosure, an existing structure of an ESD element is improved, so that a metal heat sink can effectively improve a head dissipation effect of a device, thereby improving a performance of the device.

A thermal pad and an electronic device comprising the thermal pad includes a first heat conducting layer and a second heat conducting layer. The first heat conducting layer is deformable under compression, and a heat conduction capability of the first heat conducting layer in a thickness direction of the first heat conducting layer is greater than a heat conduction capability of the first heat conducting layer in a plane direction of the first heat conducting layer. The second heat conducting layer is not deformable under compression, and a heat conduction capability of the second heat conducting layer in a plane direction of the second heat conducting layer is greater than or equal to a heat conduction capability of the second heat conducting layer in a thickness direction of the second heat conducting layer.

A method of manufacturing a packaged semiconductor device includes forming an assembly by placing a semiconductor die over a substrate with a die attach material between the semiconductor die and the substrate. A conformal structure which includes a pressure transmissive material contacts at least a portion of a top surface of the semiconductor die. A pressure is applied to the conformal structure and in turn, the pressure is transmitted to the top surface of the semiconductor die by the pressure transmissive material. While the pressure is applied, concurrently encapsulating the assembly with a molding compound and exposing the assembly to a temperature that is sufficient to cause the die attach material to sinter.