A power overlay (POL) module includes a semiconductor device having a body, including a first side and an opposing second side. A first contact pad defined on the semiconductor device first side and a dielectric layer, having a first side and an opposing second side defining a set of first apertures therethrough, is disposed facing the semiconductor device first side. The POL module, includes a metal interconnect layer, having a first side and an opposing second side, the metal interconnect layer second side is disposed on the dielectric layer first side) and extends through the set of first apertures to define a set of vias electrically coupled to the first contact pad. An enclosure defining an interior portion is coupled to the metal interconnect layer first side, and a phase change material (PCM) is disposed in the enclosure interior portion.

A heat dissipation structure assembly includes an elastic limiting member, a paste-type heat dissipation wall, a fitting member, a phase-change metal, and an assembling plate. The elastic limiting member is adapted to be disposed at a periphery of a heat source. The paste-type heat dissipation wall is adapted to be in contact with the periphery of the heat source. The fitting member is in contact with the paste-type heat dissipation wall and engaged with the elastic limiting member. The phase-change metal is adapted to be filled into a region among the fitting member, the paste-type heat dissipation wall, and the heat source. When a temperature of the phase-change metal exceeds a critical temperature, a state of the phase-change metal is changed to a liquid state. The assembling plate is connected to the fitting member, and the assembling plate is in contact with the paste-type heat dissipation wall.

A semiconductor package includes a semiconductor chip; a redistribution insulating layer including a first opening; an external connection bump including a first part in the first opening; a lower bump pad including a first surface in physical contact with the first part of the external connection bump and a second surface opposite to the first surface, wherein the first surface and the redistribution insulating layer partially overlap; and a redistribution pattern that electrically connects the lower bump pad to the semiconductor chip.

A protective case includes a protective shell and a heat dissipation film. The protective shell has an inner wall. The heat dissipation film is attached on the inner wall. The heat dissipation film includes a plastic base layer, a heat diffusion layer and a heat absorption layer stacked sequentially in a direction away from the inner wall. Therefore, the heat dissipation film is attached on the inner wall of the protective shell to make the protective case for a mobile device possess desirable efficiency of heat dissipation.

A method includes forming a solder layer on a surface of one or more chips. A lid is positioned over the solder layer on each of the one or more chips. Heat and pressure are applied to melt the solder layer and attach each lid to a corresponding solder layer. The solder layer has a thermal conductivity of ≥50 W/mK.

A processor cooling system may include a processor, a shell having an interior thermally coupled to the processor to receive heat from the processor and a mass of solid to liquid (STL) phase change material filling the shell.

An apparatus is provided which comprises: a package substrate, an integrated circuit device coupled to a surface of the package substrate, a first material on the surface of the package substrate, the first material contacting one or more lateral sides of the integrated circuit device, the first material extending at least to a surface of the integrated circuit device opposite the package substrate, two or more separate fins over a surface of the integrated circuit device, the two or more fins comprising a second material having a different composition than the first material, and a third material having a different composition than the second material, the third material over the surface of the integrated circuit device and between the two or more fins. Other embodiments are also disclosed and claimed.

An integrated circuit device includes a semiconductor substrate, an active area in a surface of the semiconductor substrate, a gate electrode, source and drain regions in the active area on opposite sides of the gate electrode to form a transistor, an active conductive pattern connected to a first plurality of electrical contacts for applying electrical signals to the transistor, and a dummy conductive pattern connected to a first plurality of thermal contacts for removing heat from the first active area, where the thermal contacts are electrically isolated from receiving the electrical signals applied to the electrical contacts.

In one example, a method includes providing a first side of a semiconductor substrate with a plurality of transistors, etching a second side of the substrate, opposite the first side, with a pattern of trenches, the trenches having a pre-defined depth and width, and providing the etched semiconductor substrate in a package. In one example, the predefined depth and width of the trenches is such so as to increase the surface area of the second side of the substrate by at least 20 percent. In one example, the method also includes providing a layer of a thermal interface material (TIM) on the second side of the substrate, including to fill at least a portion of the trenches.

An information handling system may include an information handling resource and a phase change material assembly thermally coupled to the information handling resource and comprising a fixture formed from thermally-conductive material and having an enclosed plenum and phase change material enclosed within the enclosed plenum and having a phase change temperature at which the phase change material changes from a first physical phase to a second physical phase, such that during a phase change of the phase change material, the phase change material absorbs thermal energy from the information handling resource to maintain the information handling resource at approximately the phase change temperature.