A semiconductor device has a first semiconductor die and second semiconductor die with a conductive layer formed over the first semiconductor die and second semiconductor die. The second semiconductor die is disposed adjacent to the first semiconductor die with a side surface and the conductive layer of the first semiconductor die contacting a side surface and the conductive layer of the second semiconductor die. An interconnect, such as a conductive material, is formed across a junction between the conductive layers of the first and second semiconductor die. The conductive layer may extend down the side surface of the first semiconductor die and further down the side surface of the second semiconductor die. An extension of the side surface of the first semiconductor die can interlock with a recess of the side surface of the second semiconductor die. The conductive layer extends over the extension and into the recess.

A semiconductor device is provided that includes a lead frame, a die attached to the lead frame using a first solder, a source clip and a gate clip attached to the die using a second solder, and a drain clip attached to the lead frame. The semiconductor device is inverted, so that the source clip and the gate clip are positioned on the bottom side of the semiconductor device, and the lead frame is positioned on the top side of the semiconductor device so that the lead frame is a top exposed drain clip.

A component comprising a structural element, a leadframe and a shaped body, in which component the structural element and the leadframe are enclosed at least in regions by the shaped body in lateral directions and the leadframe does not project beyond side faces of the shaped body. The leadframe has at least one first subregion and at least one second subregion which is laterally spaced apart from the first subregion, wherein the structural element is electrically conductively connected to the second subregion by a planar contact structure. Furthermore, the structural element is arranged, in plan view, on the first subregion and projects laterally beyond the first subregion at least in regions, so that the structural element and the first subregion form an anchoring structure at which the structural element and the first subregion are anchored to the shaped body. Further specified is a method for producing such a component.

A method for forming a through-substrate via structure includes providing a substrate and providing a conductive via structure adjacent to a first surface of the substrate. The method includes providing a recessed region on an opposite surface of the substrate towards the conductive via structure. The method includes providing an insulator in the recessed region and providing a conductive region extending along a first sidewall surface of the recessed region in the cross-sectional view. In some examples, the first conductive region is provided to be coupled to the conductive via structure and to be further along at least a portion of the opposite surface of the substrate outside of the recessed region. The method includes providing a protective structure within the recessed region over a first portion of the first conductive region but not over a second portion of the first conductive region that is outside of the recessed region. The method includes attaching a conductive bump to the second portion of the first conductive region.

A semiconductor module (semiconductor device) includes a case that has a side wall to form a frame, the side wall having a concave portion, a multi-layer structure in which a first terminal, an insulating sheet, and a second terminal are stacked in that order and which is disposed on the concave portion, and a beam member that is attached to the concave portion of the case to fix the multi-layer structure disposed on the concave portion.

A semiconductor device, including a capacitor, a semiconductor module having a first power terminal formed on a front surface of a first insulating member, and a connecting member electrically connecting and mechanically coupling the semiconductor module and the capacitor to each other, the connecting member having a front surface and a rear surface opposite to each other, the rear surface being on a front surface of the first power terminal. The connecting member is bonded to the semiconductor module via a first welded portion, which penetrates the front and rear surfaces of the connecting member, and penetrates the front surface of the first power terminal, in a thickness direction of the semiconductor device, a distance in the thickness direction between a bottommost portion of first welded portion and the front surface of the first insulating member being 0.3 mm or more.

Embodiments disclosed herein include semiconductor devices. In an embodiment, a die comprises a substrate, where the substrate comprises a semiconductor material. In an embodiment a fiducial is on the substrate. In an embodiment, the fiducial is a cantilever beam that extends out past an edge of the substrate.

A method of making a package is disclosed. The method may include forming bond pads on a first surface of a substrate, forming leads in the substrate by etching recesses in a second surface of the substrate, the second surface being opposite the first surface, and plating at least a portion of a top surface of the leads with a layer of finish plating. The method may also include thermosonically bonding the leads to a die by thermosonically bonding the finish plating to the die and encapsulating the die and the leads in an encapsulant.

Embodiments of the present disclosure provide a stacking edge interconnect chiplet. In one embodiment, a semiconductor device is provided. The semiconductor device includes a first integrated circuit die comprising a first device layer having a first side and a second side opposite the first side, a first interconnect structure disposed on the first side of the first device layer, and a second interconnect structure disposed on the second side of the first device layer. The semiconductor device also includes a power line extending through the first device layer and in contact with the first interconnect structure and the second interconnect structure, and a second integrated circuit die disposed over the first integrated circuit die, the second integrated circuit die comprising a third interconnect structure in contact with the second interconnect structure of the first integrated circuit die.

A semiconductor device, including a capacitor, a semiconductor module having a first power terminal formed on a front surface of a first insulating member, and a connecting member electrically connecting and mechanically coupling the semiconductor module and the capacitor to each other, the connecting member having a front surface and a rear surface opposite to each other, the rear surface being on a front surface of the first power terminal. The connecting member is bonded to the semiconductor module via a first welded portion, which penetrates the front and rear surfaces of the connecting member, and penetrates the front surface of the first power terminal, in a thickness direction of the semiconductor device, a distance in the thickness direction between a bottommost portion of first welded portion and the front surface of the first insulating member being 0.3 mm or more.