H01L23/49872

Semiconductor device for RF integrated circuit
11557539 · 2023-01-17 · ·

In order to reduce costs as well as to effectively dissipate heat in certain RF circuits, a semiconductor device of the circuit can include one or more active devices such as transistors, diodes, and/or varactors formed of a first semiconductor material system integrated onto (e.g., bonded to) a base substrate formed of a second semiconductor material system that includes other circuit components. The first semiconductor material system can, for example, be the III-V or III-N semiconductor system, and the second semiconductor material system can, for example be silicon.

Electronic package, supporting structure and fabrication method thereof

A supporting structure is provided, which forms a protective layer on a metal member having a plurality of conductive posts, and the protective layer is exposed from end surfaces of the conductive posts, such that conductors are formed on the end surfaces of the conductive posts, thereby avoiding damage of the protective layer.

SEMICONDUCTOR DEVICE FOR RF INTEGRATED CIRCUIT
20230197611 · 2023-06-22 ·

In order to reduce costs as well as to effectively dissipate heat in certain RF circuits, a semiconductor device of the circuit can include one or more active devices such as transistors, diodes, and/or varactors formed of a first semiconductor material system integrated onto (e.g., bonded to) a base substrate formed of a second semiconductor material system that includes other circuit components. The first semiconductor material system can, for example, be the III-V or III-N semiconductor system, and the second semiconductor material system can, for example be silicon.

3-D package having plurality of substrates

A package includes an interposer, which includes a first substrate free from through-vias therein, redistribution lines over the first substrate, and a first plurality of connectors over and electrically coupled to the redistribution lines. A first die is over and bonded to the first plurality of connectors. The first die includes a second substrate, and through-vias in the second substrate. A second die is over and bonded to the plurality of connectors. The first die and the second die are electrically coupled to each other through the redistribution lines. A second plurality of connectors is over the first die and the second die. The second plurality of connectors is electrically coupled to the first plurality of connectors through the through-vias in the second substrate.

Solid-state imaging device

A solid-state imaging device includes: a first electrode formed above a semiconductor substrate; a photoelectric conversion film formed on the first electrode and for converting light into signal charges; a second electrode formed on the photoelectric conversion film; a charge accumulation region electrically connected to the first electrode and for accumulating the signal charges converted from the light by the photoelectric conversion film; a reset gate electrode for resetting the charge accumulation region; an amplification transistor for amplifying the signal charges accumulated in the charge accumulation region; and a contact plug in direct contact with the charge accumulation region, comprising a semiconductor material, and for electrically connecting to each other the first electrode and the charge accumulation region.

Semiconductor package with in-package compartmental shielding and active electro-magnetic compatibility shielding

A semiconductor package includes a substrate having a semiconductor chip disposed on a top surface of the substrate, a ground ring surrounding the semiconductor chip on the top surface of the substrate, a metal-post reinforced glue wall disposed on the ground ring to surround the semiconductor chip, and a molding compound disposed only inside the metal-post reinforced glue wall and covering the semiconductor chip. The metal-post reinforced glue wall comprises a magnetic or magnetizable filler so as to form an active electro-magnetic compatibility (EMC) shielding.

SILICON INTERPOSER INCLUDING THROUGH-SILICON VIA STRUCTURES WITH ENHANCED OVERLAY TOLERANCE AND METHODS OF FORMING THE SAME
20210375741 · 2021-12-02 ·

An array of through-silicon via (TSV) structures is formed through a silicon substrate, and package-side metal pads are formed on backside surfaces of the array of TSV structures. The silicon substrate is disposed over a carrier substrate, and an epoxy molding compound (EMC) interposer frame is formed around the silicon substrate. A die-side redistribution structure is formed over the silicon substrate and the EMC interposer frame, and at least one semiconductor die is attached to the die-side redistribution structure. The carrier substrate is removed from underneath the package-side metal pads. A package-side redistribution structure is formed on the package-side metal pads and on the EMC interposer frame. Overlay tolerance between the package-side redistribution wiring interconnects and the package-side metal pads increases due to increased areas of the package-side metal pads.

Landing pad apparatus for through-silicon-vias
11742270 · 2023-08-29 · ·

An apparatus is provided which comprises: a plurality of interconnects to couple a silicon interposer to a substrate; and a landing pad configured in a non-circle shape, wherein the plurality of interconnects are adjacent to the landing pad at one end of the plurality of interconnects through a plurality of vias.

COMPONENT FOR A STRETCHABLE ELECTRONIC DEVICE

A method of manufacturing a component for a stretchable electronic device comprises providing a silicon wafer comprising a first surface and a second surface; applying a layer of a conductive metal onto at least a portion of the first surface of the silicon wafer; providing a stretchable silicone substrate having a first surface and a second surface; and plasma bonding at least a portion of the second surface of the silicon wafer to at least a portion of the first surface of the stretchable silicone substrate.

Leadframe with a metal oxide coating and method of forming the same

A leadframe including a metal oxide layer on at least a portion of the leadframe are disclosed. More specifically, leadframes with a metal layer and a metal oxide layer formed on one or more leads before a tin finish plating layer is formed are described. The layers of metal and metal oxide between the one or more leads and the tin finish plating layer reduce the formation of tin whiskers, thus reducing the likelihood of shorting and improving the overall reliability of the package structure and device produced.