A transient electronic device utilizes a glass-based interposer that is treated using ion-exchange processing to increase its fragility, and includes a trigger device operably mounted on a surface thereof. An integrated circuit (IC) die is then bonded to the interposer, and the interposer is mounted to a package structure where it serves, under normal operating conditions, to operably connect the IC die to the package I/O pins/balls. During a transient event (e.g., when unauthorized tampering is detected), a trigger signal is transmitted to the trigger device, causing the trigger device to generate an initial fracture force that is applied onto the glass-based interposer substrate. The interposer is configured such that the initial fracture force propagates through the glass-based interposer substrate with sufficient energy to both entirely powderize the interposer, and to transfer to the IC die, whereby the IC die also powderizes (i.e., visually disappears).

An integrated circuit includes a number of components disposed at a surface of a semiconductor body and an interconnect region connecting the components into a functional circuit. A metallic shield is also produced in the interconnect region. A configurable stage is configurable to operate in a receiving antenna configuration or in a detection configuration during which the integrated circuit is configured to detect a presence of an external electromagnetic radiation representative of an attack by injection of faults

An integrated circuit includes a first domain supplied with power at a first supply voltage. A first transistor comprising in the first domain includes a first gate region and a first gate dielectric region. A second domain is supply with power at a second supply voltage and includes a second transistor having a second gate region and a second gate dielectric region, the second gate region being biased at a voltage that is higher than the first supply voltage. The first and second gate dielectric regions have the same composition, wherein that composition configures the first transistor in a permanently turned off condition in response to a gate bias voltage lower than or equal to the first supply voltage. The second transistor is a floating gate memory cell transistor, with the second gate dielectric region located between the floating and control gates.

Unclonable function circuitry includes a plurality of pairs of phase-change memory cells in a virgin state, and sensing circuitry coupled to the plurality of pairs of phase-change memory cells in the virgin state. The sensing circuitry identifies a subset of the plurality of pairs of phase-change memory cells in the virgin state based on a reliability mask. Signs of differences of effective resistance values of the identified subset of the plurality of pairs of phase-change memory cells in the virgin state are sensed by the sensing circuitry. The sensing circuitry generates a string of bits based on the sensed signs of differences in the effective resistance values of the identified subset of the plurality of pairs of phase-change memory cells in the virgin state. Processing circuitry coupled to the unclonable function circuitry, in operation, executes one or more operations using the generated string of bits.

A semiconductor substrate includes a buried semiconductor layer and semiconductor wells. A device for detecting a possible thinning of the semiconductor substrate via the rear face thereof is formed on and in the semiconductor wells. The device is a non-inverting buffer including an input terminal and an output terminal, the device being powered between a supply terminal and a reference terminal where the buried semiconductor layer provides the supply terminal. A control circuit delivers an input signal in a first state to the input terminal and outputs a control signal indicating a detection of a thinning of the substrate if a signal generated at the output terminal in response to the input signal is in a second state different from the first state.

A laser detecting circuit is provided. The laser detecting circuit includes a latch circuit with a first inverter configured to invert a first output signal at a first node to generate a second output signal at a second node, and a second inverter configured to generate the first output signal based on the second output signal. The second inverter includes a plurality of PMOS transistors connected in series between a first source voltage and the first node, and a plurality of NMOS transistors. A gate of each of the plurality of PMOS transistors is connected to the second node, and a drain of each of the plurality of NMOS transistors is connected to the first node. The plurality of NMOS transistors includes dummy NMOS transistors and normal NMOS transistors.

An embodiment integrated circuit includes a first electromagnetic pulse detection device that comprises a first loop antenna formed in an interconnection structure of the integrated circuit, a first end of the first antenna being connected to a first node of application of a power supply potential and a second end of the antenna being coupled to a second node of application of the power supply potential, and a first circuit connected to the second end of the first antenna and configured to output a first signal representative of a comparison of a first current in the first antenna with a first threshold.

Methods and apparatus for providing an assembly including a base substrate, a lid substrate, and a ring frame between the base substrate and the lid substrate to define a protected volume, where the ring frame includes through vias. A die may be contained in the protected volume. Sensor circuitry can include conductive pillars in the protected volume and the die can include circuity to determine an impedance of the pad and the pillars for tamper detection. An edge cap can be coupled to at least one side of the assembly for tamper detection.

An integrated circuit (IC) implements a radiation tolerance limiting feature (RTLF) to ensure that the IC, as manufactured, will fail one or more applicable radiation tolerance tests, for example by reducing or eliminating a required voltage or blocking a required signal. As a result, the IC can be manufactured by any suitable IC foundry, and exported without restriction. The RTLF can include a leakage component, such as an oxide dielectric capacitor, a radiation-sensitive MOSFET or SCR, or a photocurrent generating component. The RTLF can include redundancy to ensure reliability. A plurality of RTLFs can be included to ensure failure of any desired combination of applicable radiation tolerance tests, such as total radiation dosage, linear energy transfer events, radiation dose rate, and single event upset. The RTLF can be obfuscated within the IC design. The RTLF can include a testing output to ensure its functionality.

An integrated circuit including an electronic fuse for supporting a secure bootstrap process, in which the fuse is queried. The circuit includes a protection against electromagnetic fault injection. The circuit is configured in such a way that the protection extends to the bootstrap process.