Patent classifications
H01L24/44
ELECTRO-OPTICAL PACKAGE AND METHOD OF FABRICATION
An electro-optical package. In some embodiments, the package includes: a carrier; a first integrated circuit, on the carrier; a first bonding layer, between the carrier and the first integrated circuit; a thermoelectric cooler, on the carrier; a second integrated circuit, on the thermoelectric cooler; and a first wire bond. The first wire bond may connect a first pad, on the first integrated circuit, to a second pad, on the second integrated circuit, the first pad and the second pad having a height difference less than 100 microns.
THREE-DIMENSIONAL STACKED FAN-OUT PACKAGING STRUCTURE AND METHOD MAKING THE SAME
The present disclosure provides a three-dimensional stacked fan-out packaging structure and a method making the same. The structure includes: a first semiconductor chip, a first packaging material layer, a metal connecting pillar, a first rewiring layer, a second rewiring layer, a second semiconductor chip, solder ball bumps, an underfill layer under the second semiconductor chip, and a second packaging material layer. The formed three-dimensional stacked fan-out packaging structure can package two sets of fan-out wafers in the three-dimensional direction. A single package stacked up after die-cutting has two sets of chips in the third-direction. The electrical signals of all chips in a single package can be controlled by arranging a first rewiring layer, a metal connecting post, and the second rewiring layer, so that more chips can be packaged in a single package, the integration of the package is improved, and the package volume can shrink.
Wire bonding method and wire bonding apparatus
A wire bonding method comprises: preparing a wire bonding apparatus; a step of forming a free air ball; a first height measuring step of measuring the height of a first electrode by detecting whether the free air ball is grounded to the first electrode; a second height measuring step of measuring the height of a second electrode by detecting whether the free air ball is grounded to the second electrode; a first bonding step of controlling the height of a bonding tool based on the measurement result in the first height measuring step, and bonding the free air ball to the first electrode; and a second bonding step of controlling the height of the bonding tool based on the measurement result in the second height measuring step, and bonding a wire to the second electrode to connect the first and the second electrodes. Thus, electrodes can be correctly bonded.
Coated wire
A wire comprising a wire core with a surface, the wire core having a coating layer superimposed on its surface, wherein the wire core includes: (a) pure silver consisting of silver and further components; or (b) doped silver consisting of silver, at least one doping element, and further components; or (c) a silver alloy consisting of silver, palladium and further components; or (d) a silver alloy consisting of silver, palladium, gold, and further components; or (e) a doped silver alloy consisting of silver, palladium, gold, at least one doping element, and further components, wherein the individual amount of any further component is less than 30 wt.-ppm and the individual amount of any doping element is at least 30 wt.-ppm, and the coating layer is a single-layer of gold or palladium or a double-layer comprised of an inner layer of nickel or palladium and an adjacent outer layer of gold.
Light emitting apparatus and method of manufacturing light emitting apparatus
A light emitting apparatus according to an embodiment of the present technology includes a base portion, a light emitting element, and a cover portion. The base portion includes a support surface. The light emitting element is disposed on the support surface of the base portion. The cover portion includes a light transmission portion through which light emitted from the light emitting element is transmitted and a protrusion portion which is provided on at least a part of a periphery of the light transmission portion and protruded relative to the light transmission portion, the cover portion being provided on the support surface in such a manner as to cover the light emitting element.
Embedded wire bond wires
Apparatuses relating generally to a vertically integrated microelectronic package are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface. A first microelectronic device is coupled to the upper surface of the substrate. The first microelectronic device is a passive microelectronic device. First wire bond wires are coupled to and extend away from the upper surface of the substrate. Second wire bond wires are coupled to and extend away from an upper surface of the first microelectronic device. The second wire bond wires are shorter than the first wire bond wires. A second microelectronic device is coupled to upper ends of the first wire bond wires and the second wire bond wires. The second microelectronic device is located above the first microelectronic device and at least partially overlaps the first microelectronic device.
Semiconductor device having plate-shaped metal terminals facing one another
Provided is a semiconductor device according to an embodiment including a plate-shaped first metal terminal, a plate-shaped second metal terminal provided to face the first metal terminal, a resin layer provided between the first metal terminal and the second metal terminal, and a semiconductor chip having a first upper electrode electrically connected to the first metal terminal and a first lower electrode electrically connected to the second metal terminal, wherein a first distance between the first metal terminal and the second metal terminal at the end portion of the first metal terminal is larger than a second distance between the first metal terminal and the second metal terminal at a portion inside the end portion of the first metal terminal.
SEMICONDUCTOR DEVICE HAVING PLATE-SHAPED METAL TERMINALS FACING ONE ANOTHER
Provided is a semiconductor device according to an embodiment including a plate-shaped first metal terminal, a plate-shaped second metal terminal provided to face the first metal terminal, a resin layer provided between the first metal terminal and the second metal terminal, and a semiconductor chip having a first upper electrode electrically connected to the first metal terminal and a first lower electrode electrically connected to the second metal terminal, wherein a first distance between the first metal terminal and the second metal terminal at the end portion of the first metal terminal is larger than a second distance between the first metal terminal and the second metal terminal at a portion inside the end portion of the first metal terminal.
WIRE BONDING METHOD AND WIRE BONDING APPARATUS
A wire bonding method comprises: preparing a wire bonding apparatus; a step of forming a free air ball; a first height measuring step of measuring the height of a first electrode by detecting whether the free air ball is grounded to the first electrode; a second height measuring step of measuring the height of a second electrode by detecting whether the free air ball is grounded to the second electrode; a first bonding step of controlling the height of a bonding tool based on the measurement result in the first height measuring step, and bonding the free air ball to the first electrode; and a second bonding step of controlling the height of the bonding tool based on the measurement result in the second height measuring step, and bonding a wire to the second electrode to connect the first and the second electrodes. Thus, electrodes can be correctly bonded.
Fan-out semiconductor package module
A fan-out semiconductor package module includes: a structure including a wiring member including wiring patterns, one or more first passive components disposed on the wiring member and electrically connected to the wiring pattern, and a first encapsulant encapsulating at least portions of each of the one or more first passive components, and having a first through-hole penetrating through the wiring member and the first encapsulant; a semiconductor chip disposed in the first through-hole of the structure and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; a second encapsulant encapsulating at least portions of the semiconductor chip and filling at least portions of the first through-hole; and a connection member disposed on the structure and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads and the wiring patterns.