A solder bump forming member including: a base substrate having a plurality of recesses; and solder particles in the recesses, in which the solder particle has an average particle diameter of 1 to 35 μm and a C.V. value of 20% or less, and a part of the solder particle projects from the recess, or in cross-sectional view, when a depth of the recess is designated as H.sub.1, and a height of the solder particle is designated as H.sub.2, H.sub.1<H.sub.2 is established.

During electro-oxidative metal removal on a semiconductor substrate, the substrate having a metal layer is anodically biased and the metal is electrochemically dissolved into an electrolyte. Metal particles (e.g., copper particles when the dissolved metal is copper) can inadvertently form on the surface of the substrate during electrochemical metal removal and cause defects during subsequent semiconductor processing. Contamination with such particles can be mitigated by preventing particle formation and/or by dissolution of particles. In one implementation, mitigation involves using an electrolyte that includes an oxidizer, such as hydrogen peroxide, during the electrochemical metal removal. An electrochemical metal removal apparatus in one embodiment has a conduit for introducing an oxidizer to the electrolyte and a sensor for monitoring the concentration of the oxidizer in the electrolyte.

An apparatus for forming a solder bump on a substrate including a supporter configured to support the substrate to be provided thereon, a housing surrounding the supporter, a cover defining a manufacturing space in combination with the housing and including an edge heating zone along a perimeter thereof, the manufacturing space surrounding the supporter, and an oxide remover supply nozzle configured to supply an oxide remover to the manufacturing space may be provided.

Techniques regarding forming flip chip interconnects are provided. For example, one or more embodiments described herein can comprise a three-dimensionally printed flip chip interconnect that includes an electrically conductive ink material that is compatible with a three-dimensional printing technology. The three-dimensionally printed flip chip interconnect can be located on a metal surface of a semiconductor chip.

A height of a vertical wire interconnection bonded onto a substrate is measured by first capturing a top view of the vertical wire interconnection and identifying a position of a tip end of the vertical wire interconnection from the top view. A conductive probe is located over the tip end of the vertical wire interconnection, and is lowered towards the vertical wire interconnection until an electrical connection is made between the conductive probe and the tip end of the vertical wire interconnection. A contact height at which the electrical connection is made may thus be determined, wherein the contact height corresponds to the height of the vertical wire interconnection.

Apparatus and methods are disclosed for transferring solder to a substrate. A substrate belt moves one or more substrates in a belt direction. A decal has one or more through holes in a hole pattern that hold solder. Each of the solder holes can align with respective locations on one of the substrates. An ultrasonic head produces an ultrasonic vibration in the solder in a longitudinal direction perpendicular to the belt direction. The ultrasonic head and substrate can be moved together in the longitudinal direction to maintain the ultrasonic head in contact with the solder while the ultrasonic head applies the ultrasonic vibration. Various methods are disclosed including methods of transferring the solder with or without external heating.

Undesired deposition of metals on a lipseal (lipseal plate-out) during electrodeposition of metals on semiconductor substrates is minimized or eliminated by minimizing or eliminating ionic current directed at a lipseal. For example, electrodeposition can be conducted such as to avoid contact of a lipseal with a cathodically biased conductive material on the semiconductor substrate during the course of electroplating. This can be accomplished by shielding a small selected zone proximate the lipseal to suppress electrode-position of metal proximate the lipseal, and to avoid contact of metal with a lipseal. In some embodiments shielding is accomplished by sequentially using lipseals of different inner diameters during electroplating of metals into through-resist features, where a lipseal having a smaller diameter is used during a first electroplating step and serves as a shield blocking electrodeposition in a selected zone. In a second electroplating step, a lipseal of a larger inner diameter is used.

External electrical connectors and methods of forming such external electrical connectors are discussed. A method includes forming an external electrical connector structure on a substrate. The forming the external electrical connector structure includes plating a pillar on the substrate at a first agitation level affected at the substrate in a first solution. The method further includes plating solder on the external electrical connector structure at a second agitation level affected at the substrate in a second solution. The second agitation level affected at the substrate is greater than the first agitation level affected at the substrate. The plating the solder further forms a shell on a sidewall of the external electrical connector structure.

An apparatus and method for manufacturing a semiconductor package structure are provided. The method includes: providing a process line comprising a first semiconductor manufacturing portion configured to provide a first operation including a first process step, and a second semiconductor manufacturing portion configured to provide a second operation including a second process step; passing a packaging structure through the second semiconductor manufacturing portion, wherein the second semiconductor manufacturing portion applies the second process step to the packaging structure; passing the packaging structure through the first semiconductor manufacturing portion, wherein the first semiconductor manufacturing portion applies the first process step to the packaging structure; and passing the packaging structure through the second semiconductor manufacturing portion again without applying the second process step thereon.

A solder member mounting method includes providing a substrate having bonding pads formed thereon, detecting a pattern interval of the bonding pads, selecting one of solder member attachers having different pattern intervals from each other, such that the one selected solder member attacher of the solder member attachers has a pattern interval corresponding to the detected pattern interval of the bonding pads, and attaching solder members on the bonding pads of the substrate, respectively, using the one selected solder member attacher.