A trench-gate MOSFET with electric field shielding region, has a substrate; a source electrode; a drain electrode; a semiconductor region with a first doping type formed on the substrate; a trench-gate, a plurality of electric field shielding regions with a second doping type formed under a surface of the semiconductor region, wherein the electric field shielding region intersects the trench-gate at an angle; a source electrode region formed on both sides of the trench-gate is divided into a plurality of source electrode sub-regions by the plurality of electric field shielding regions.

There is provided a semiconductor device including: a semiconductor layer including a main surface; a plurality of trenches including a plurality of first trench portions and a plurality of second trench portions, respectively; an insulating layer formed in an inner wall of each of the second trench portions; a first electrode buried in each of the second trench portions with the insulating layer interposed between the first electrode and each of the second trench portions; a plurality of insulators buried in the first trench portions so as to cover the first electrode; a contact hole formed at a region between the plurality of first trench portions in the semiconductor layer so as to expose the plurality of insulators; and a second electrode buried in the contact hole.

A semiconductor device of the present invention includes a semiconductor layer, a gate trench that defines a source region of a first conductivity type in the semiconductor layer, a channel region of a second conductivity type of a lower part of the source region, a source trench that passes through the source region and the channel region, an impurity region of the second conductivity type of a bottom part and a side part of the source trench, a source electrode on the semiconductor layer, and a highly-concentrated impurity region of the second conductivity type, the highly-concentrated impurity region having a contact portion connected to the source electrode at a surface of the semiconductor layer, the highly-concentrated impurity region passing through the source region and extending to a position deeper than the source region, the highly-concentrated impurity region having a concentration higher than the impurity region.

A vertical semiconductor transistor is provided that includes: a source region, a drain region, and a body region formed in a semiconductor substrate; wherein the source region and the drain region are doped with a first type dopant; wherein the body region is doped with a second type dopant; and wherein the second type dopant has a doping profile within the body region that varies with distance from the source region.

A MOS transistor structure is provided. The MOS transistor structure includes a semiconductor substrate having an active area including a first edge and a second edge opposite thereto. A gate layer is disposed on the active area of the semiconductor substrate and has a first edge extending across the first and second edges of the active area. A source region having a first conductivity type is in the active area at a side of the first edge of the gate layer and between the first and second edges of the active area. First and second heavily doped regions of a second conductivity type are in the active area adjacent to the first and second edges thereof, respectively, and spaced apart from each other by the source region.

A semiconductor device includes an enhancement-mode first p-channel MISFET, an enhancement-mode second p-channel MISFET, a drain conductor electrically and commonly connected to the first p-channel MISFET and the second p-channel MISFET, a first source conductor electrically connected to a source of the first p-channel MISFET, a second source conductor electrically connected to a source of the second p-channel MISFET, and a gate conductor electrically and commonly connected to a gate of the first p-channel MISFET and a gate of the second p-channel MISFET.

A silicon carbide semiconductor device includes a silicon carbide substrate having a first principal surface and a second principal surface opposite to the first principal surface. The silicon carbide substrate includes a drift region, a body region, and a source region. A gate trench is provided on the first principal surface, the gate trench being defined by: a side surface, which passes through the source region and the body region and reaches the drift region; and a bottom surface coupled to the side surface. The silicon carbide substrate further includes a first reduced-electric field region provided between the bottom surface and the second principal surface and having a second conductive type. The source region includes a first region contacting the side surface, the first region having a first thickness. The source region includes a second region having a second thickness greater than the first thickness, the first region being interposed between the side surface and the second region. The silicon carbide semiconductor device further includes a contact electrode with an ohmic junction with the second region.

Provided is a first vertical field effect transistor in which first source regions and first connection portions via which a first body region is connected to a first source electrode are disposed alternately and cyclically in a first direction in which first trenches extend. In a second direction orthogonal to the first direction, Lxm≤Lxr≤0.20 μm holds true where Lxm denotes a distance between adjacent first trenches and Lxr denotes the inner width of a first trench. The lengths of the first connection portions are in a convergence region in which the on-resistance of the vertical field effect transistor at the time when a voltage having a specification value is applied to first gate conductors to supply current having a specification value does not decrease noticeably even when the lengths of the first connection portions are made much shorter.

The disclosure provides a thin film transistor, a manufacturing method thereof, a display substrate and a display apparatus. The thin film transistor comprises a base substrate, and an active layer disposed on the base substrate, and the active layer comprises a channel region, and a source contact region and a drain contact region respectively positioned at two sides of the channel region; and a portion of at least one of the source contact region and the drain contact region close to the channel region includes a plurality of first sub-grooves disposed at a side of the active layer proximal to the base substrate and a plurality of second sub-grooves disposed at a side of the active layer distal to the base substrate, and the plurality of first sub-grooves and the plurality of second sub-grooves being alternately disposed along a direction parallel to an extension of the channel region.

A semiconductor is disclosed that may include: a first drift region; a base region arranged on the first semiconductor layer; a source region arranged on the base region; a main electrode electrically connected to the source region; and a gate electrode structure that penetrates the source region and base region and reaches the first drift region, wherein the gate electrode structure comprises: a gate electrode; and an insulating material that insulates the gate electrode from the first drift region and the base region; and a field plate structure reaching the first drift region deeper than the gate electrode structure, wherein the field plate structure comprises: a field plate; a resistive part that electrically connects the main electrode to the field plate; and an insulating material that insulates the field plate and the resistive part section from the first drift region and the base region.