An embodiment is a semiconductor device which includes a first oxide semiconductor layer over a substrate having an insulating surface and including a crystalline region formed by growth from a surface of the first oxide semiconductor layer toward an inside; a second oxide semiconductor layer over the first oxide semiconductor layer; a source electrode layer and a drain electrode layer which are in contact with the second oxide semiconductor layer; a gate insulating layer covering the second oxide semiconductor layer, the source electrode layer, and the drain electrode layer; and a gate electrode layer over the gate insulating layer and in a region overlapping with the second oxide semiconductor layer. The second oxide semiconductor layer is a layer including a crystal formed by growth from the crystalline region.

A semiconductor structure includes an epitaxial region having a front side and a backside. The semiconductor structure includes an amorphous layer formed over the backside of the epitaxial region, wherein the amorphous layer includes silicon. The semiconductor structure includes a first silicide layer formed over the amorphous layer. The semiconductor structure includes a first metal contact formed over the first silicide layer.

A semiconductor device includes an extremely thin semiconductor-on-insulator substrate (ETSOI) having a base substrate, a thin semiconductor layer and a buried dielectric therebetween. A device channel is formed in the thin semiconductor layer. Source and drain regions are formed at opposing positions relative to the device channel. The source and drain regions include an n-type material deposited on the buried dielectric within a thickness of the thin semiconductor layer. A gate structure is formed over the device channel.

FDSOI device fabrication method is disclosed. The method comprises: disposing a buried oxide layer on the silicon substrate; disposing a SiGe channel on the buried oxide layer, disposing a nitrogen passivation layer on the SiGe channel layer; disposing a metal gate on the nitrogen passivation layer, and attaching sidewalls to sides of the metal gate; and disposing source and drain regions on the nitrogen passivation layer at both sides of the metal gate, wherein the source and drain regions are built in a raised SiGe layer. The stack structure of the SiGe layer and the nitrogen passivation layer forms the gate channel. This stack structure avoids the low stress of the silicon channel in the conventional device. In addition, it prevents the Ge diffusion from the SiGe channel to the gate dielectric in the conventional device. Thereby the invention improves reliability and performance of the device.

To provide a method by which a semiconductor device including a thin film transistor with excellent electric characteristics and high reliability is manufactured with a small number of steps. After a channel protective layer is formed over an oxide semiconductor film containing In, Ga, and Zn, a film having n-type conductivity and a conductive film are formed, and a resist mask is formed over the conductive film. The conductive film, the film having n-type conductivity, and the oxide semiconductor film containing In, Ga, and Zn are etched using the channel protective layer and gate insulating films as etching stoppers with the resist mask, so that source and drain electrode layers, a buffer layer, and a semiconductor layer are formed.

One object of one embodiment of the present invention is to provide a highly reliable semiconductor device including an oxide semiconductor, which has stable electrical characteristics. In a method for manufacturing a semiconductor device, a first insulating film is formed; source and drain electrodes and an oxide semiconductor film electrically connected to the source and drain electrodes are formed over the first insulating film; heat treatment is performed on the oxide semiconductor film so that a hydrogen atom in the oxide semiconductor film is removed; oxygen doping treatment is performed on the oxide semiconductor film, so that an oxygen atom is supplied into the oxide semiconductor film; a second insulating film is formed over the oxide semiconductor film; and a gate electrode is formed over the second insulating film so as to overlap with the oxide semiconductor film.

An oxide semiconductor film contains In, Ga, and Sn at respective atomic ratios satisfying formulae (1) to (3): 0.01≤Ga/(In+Ga+Sn)≤0.30 . . . (1); 0.01≤Sn/(In+Ga+Sn)≤0.40 . . . (2); and 0.55≤In/(In+Ga+Sn)≤0.98 . . . (3), and Al at an atomic ratio satisfying a formula (4): 0.05≤Al/(In+Ga+Sn+Al)≤0.30 . . . (4).

An embodiment is a semiconductor device which includes a first oxide semiconductor layer over a substrate having an insulating surface and including a crystalline region formed by growth from a surface of the first oxide semiconductor layer toward an inside; a second oxide semiconductor layer over the first oxide semiconductor layer; a source electrode layer and a drain electrode layer which are in contact with the second oxide semiconductor layer; a gate insulating layer covering the second oxide semiconductor layer, the source electrode layer, and the drain electrode layer; and a gate electrode layer over the gate insulating layer and in a region overlapping with the second oxide semiconductor layer. The second oxide semiconductor layer is a layer including a crystal formed by growth from the crystalline region.

A semiconductor structure includes an epitaxial region having a front side and a backside. The semiconductor structure includes an amorphous layer formed over the backside of the epitaxial region, wherein the amorphous layer includes silicon. The semiconductor structure includes a first silicide layer formed over the amorphous layer. The semiconductor structure includes a first metal contact formed over the first silicide layer.

A method for manufacturing a tellurium-based semiconductor device comprises the steps of: preparing a substrate; depositing, on the substrate, a tellurium-based semiconductor material including tellurium and a tellurium oxide so as to form a tellurium-based semiconductor layer; and forming a passivation layer on the tellurium-based semiconductor layer. According to the manufacturing method, heat treatment at a high temperature or cryogenic conditions are not required, and thus, it is possible to manufacture a semiconductor device through a practical process. In addition, since the crystallinity of the tellurium-based semiconductor layer is improved during the manufacturing process, it is possible to provide a p-type semiconductor device having excellent electrical characteristics such as electric field mobility and a current blink ratio.