Patent classifications
H01L2924/15322
ANTENNA MODULE AND CIRCUIT MODULE
An antenna that is formed of a conductor pattern is disposed on a dielectric substrate. A high-frequency semiconductor device that supplies a high-frequency signal to the antenna is mounted on the bottom surface of the dielectric substrate. A plurality of conductor columns project from the bottom surface. The conductor columns are embedded in a dielectric member that is disposed on the bottom surface. An end of each of the conductor columns is exposed through the dielectric member. The dielectric member defines a mounting surface that faces a mounting substrate. A step is formed in a side surface of a composite structure that includes the dielectric substrate and the dielectric member, and a side surface extending from the mounting surface to the step is more recessed than a side surface that is located above the step.
INTEGRATED SUBSTRATE STRUCTURE, ELECTRONIC ASSEMBLY, AND MANUFACTURING METHOD THEREOF
An integrated substrate, an electronic assembly, and manufacturing methods thereof are provided. The integrated substrate structure includes a coarse redistribution structure, fine redistribution segments, and conductive connectors. The coarse redistribution structure includes a coarse dielectric layer and a coarse circuitry embedded therein. The fine redistribution segments disposed over the coarse redistribution structure and disposed side by side and apart from one another. The respective fine redistribution segment includes a fine dielectric layer thinner than the coarse dielectric layer, and a fine circuitry embedded in the fine dielectric layer. The fine circuitry includes a dimension and a pitch finer than those of the coarse circuitry, and a layout density of the fine circuitry is denser than that of the coarse circuitry. The conductive connectors are interposed between the coarse redistribution structure and the fine redistribution segments, and the coarse circuitry is electrically coupled to the fine circuitry through the conductive connectors.
MODULE WITH EXTERNAL SHIELD AND BACK-SPILL BARRIER FOR PROTECTING CONTACT PADS
A module includes a printed circuit board (PCB) having a substrate, component pads on a top surface of the substrate, and contact pads formed on a bottom surface of the substrate. The module further includes a mold compound disposed over the PCB; an external shield disposed over a top surface of the mold compound and on side surfaces of the mold compound and the PCB, where the external shield is configured to provide shielding of at least one component connected to at least one component pad from electromagnetic radiation; and a back-spill barrier formed on the bottom of the substrate. The back-spill barrier surrounds the contact pads, and is configured to prevent the external shield from making contact with the contact pads.
Hybrid readout package for quantum multichip bonding
Systems and techniques that facilitate hybrid readout packaging for quantum multichip bonding are provided. In various embodiments, an interposer can have a first quantum chip and a second quantum chip. In various aspects, a readout resonator (e.g., input/output port) of one or more qubits on the first quantum chip can be routed to an inner portion of the interposer. In various instances, the inner portion can be located between the first quantum chip and the second quantum chip. In various aspects, routing the readout resonator to the inner portion can reduce a number of crossings and/or intersections between input/output lines on the interposer and connection buses between qubits on the interposer.
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device includes a semiconductor chip with an electrode, an insulated circuit board including an insulating board and a circuit pattern formed thereon. The circuit pattern has the semiconductor chip on a front surface thereof. The semiconductor device further includes a plurality of conductive posts, each having a lower end bonded to at least one of the front surface of the circuit pattern or the electrode of the semiconductor chip, and each extending vertically upward with respect to a front surface of the insulated circuit board, a printed circuit board bonded to an upper end side of each conductive post, a spacer disposed between the printed circuit board and the insulated circuit board such that a front surface of the printed circuit board faces the insulated circuit board, and a pressing member disposed above the spacer having the printed circuit board therebetween.
ASSEMBLY STRUCTURE AND PACKAGE STRUCTURE
An assembly structure includes a core-computing section and a sub-computing section. The core-computing section has a first surface and a second surface opposite to the first surface. The core-computing section includes at least one conductive via electrically connecting the first surface and the second surface. The sub-computing section has a first surface stacked on the first surface of the core-computing section and a second surface opposite to the first surface. The sub-computing section includes at least one conductive via electrically connecting the first surface and the second surface. The assembly structure includes a first signal transmission path and a second signal transmission path. The first signal transmission path is between the at least one conductive via of the sub-computing section and the at least one conductive via of the core-computing section. The second signal transmission path is between the second surface of the sub-computing section and the at least one conductive via of the sub-computing section.
Multi-Chip Integrated Fan-Out Package
A method includes surrounding a die and a conductive pillar proximate the die with a molding material, where the die and the conductive pillar are disposed over a first side of a first redistribution structure, where a second side of the first redistribution structure opposing the first side is attached to a first carrier; bonding conductive pads disposed on a first surface of a pre-made second redistribution structure to the die and to the conductive pillar, where a second surface of the pre-made second redistribution structure opposing the first surface is attached to a second carrier; after bonding the conductive pads, removing the second carrier to expose conductive features of the pre-made second redistribution structure proximate the second surface; and forming conductive bumps over and electrically coupled to the conductive features of the pre-made second redistribution structure.
Electronic component module, electronic component unit, and method for manufacturing electronic component module
An electronic component module includes a second terminal electrode that is independent of a first terminal electrode in terms of potential. A second electronic component is mounted on a board, with a first surface thereof facing the board. A heat transfer portion is disposed on a second surface of the second electronic component, the heat transfer portion being connected to both the first terminal electrode and the second terminal electrode. A heat dissipation portion is connected to the board via the first terminal electrode, the second terminal electrode, and the heat transfer portion.
Assembly structure and package structure
An assembly structure includes a core-computing section and a sub-computing section. The core-computing section has a first surface and a second surface opposite to the first surface. The core-computing section includes at least one conductive via electrically connecting the first surface and the second surface. The sub-computing section has a first surface stacked on the first surface of the core-computing section and a second surface opposite to the first surface. The sub-computing section includes at least one conductive via electrically connecting the first surface and the second surface. The assembly structure includes a first signal transmission path and a second signal transmission path. The first signal transmission path is between the at least one conductive via of the sub-computing section and the at least one conductive via of the core-computing section. The second signal transmission path is between the second surface of the sub-computing section and the at least one conductive via of the sub-computing section.
Multi-chip integrated fan-out package
A method includes surrounding a die and a conductive pillar proximate the die with a molding material, where the die and the conductive pillar are disposed over a first side of a first redistribution structure, where a second side of the first redistribution structure opposing the first side is attached to a first carrier; bonding conductive pads disposed on a first surface of a pre-made second redistribution structure to the die and to the conductive pillar, where a second surface of the pre-made second redistribution structure opposing the first surface is attached to a second carrier; after bonding the conductive pads, removing the second carrier to expose conductive features of the pre-made second redistribution structure proximate the second surface; and forming conductive bumps over and electrically coupled to the conductive features of the pre-made second redistribution structure.