H01L2924/1611

PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF

A package structure includes a circuit substrate, a package element and a molding layer. The package element is disposed on the circuit substrate and is electrically connected with the circuit substrate. The molding layer is disposed over the circuit substrate and covers at least a top surface of the circuit substrate. The molding layer includes a first portion wrapping around sidewalls of the package element and having a first thickness, and a second portion surrounding the first portion and connected with the first portion. The first thickness of the first portion is larger than a second thickness of the second portion. A top surface of the first portion of the molding layer is higher than a top surface of the package element.

HIGH-FREQUENCEY PACKAGE, HIGH-FREQUENCY MODULE, AND RADIO WAVE ABSORPTION METHOD
20230103894 · 2023-04-06 · ·

A high-frequency package includes a radio wave shielding portion that shields radio waves radiated from a high-frequency component, a radio wave absorber that is arranged facing the high-frequency component and that absorbs the radio waves, and an adjusting means that enables adjustment of distance from the radio wave absorber to the high-frequency component by adjusting a position of the radio wave absorber with respect to the radio wave shielding portion.

Semiconductor Device and Method for Manufacturing The Same
20230154822 · 2023-05-18 ·

A semiconductor device includes a first heat sink formed in contact with a back surface of a first semiconductor chip, and a second heat sink formed in contact with a back surface of a second semiconductor chip. The first heat sink is made of a material with larger thermal conductivity than that of the first semiconductor chip and has a heat dissipation surface exposed from the mold resin layer to the outside. The second heat sink is made of a material with larger thermal conductivity than that of the second semiconductor chip and has a heat dissipation surface exposed from the mold resin layer to the outside.

POWER MODULE

A power module includes a first conductor plate to which a first power semiconductor element is bonded, a second conductor plate to which a second power semiconductor element is bonded, the second conductor plate being disposed adjacent to the first conductor plate, a first heat-dissipating member disposed counter to the first conductor plate and the second conductor plate, and a first insulating sheet member disposed between the first heat-dissipating member and the first conductor plate. The first power semiconductor element is disposed at a position at which a first length from an end of the first conductor plate, the end being closer to the second conductor plate, to the first power semiconductor element is larger than a second length from an end of the first conductor plate, the end being far from the second conductor plate, to the first power semiconductor element, and the second length is larger than the thickness of the first conductor plate.

POWER SEMICONDUCTOR MODULE, METHOD FOR ASSEMBLING A POWER SEMICONDUCTOR MODULE AND HOUSING FOR A POWER SEMICONDUCTOR MODULE
20230170287 · 2023-06-01 ·

A power semiconductor module includes: a substrate with a metallization layer attached to a dielectric insulation layer and a semiconductor body mounted to the metallization layer; a housing at least partly enclosing the substrate and having sidewalls and a cover that at least partly covers an opening formed by the sidewalls and has a flexible portion; and a press-on pin having arranged on the substrate or semiconductor body. A first end of the press-on pin faces the substrate or semiconductor body and extends towards the cover such that a second end of the press-on pin contacts the flexible portion of the cover. The substrate in an area vertically below the press-on pin has a first spring constant k.sub.1 in a vertical direction that is perpendicular to a top surface of the substrate. The flexible portion of the cover has a second spring constant k.sub.2, where 0.5*k.sub.1≤k.sub.2≤5*k.sub.1.

.SUB.3.DIC package comprising perforated foil sheet

A structure includes a thermal interface material, and a Perforated Foil Sheet (PFS) including through-openings therein, with a first portion of the PFS embedded in the thermal interface material. An upper layer of the thermal interface material is overlying the PFS, and a lower layer of thermal interface material is underlying the PFS. The thermal interface material fills through-openings in the PFS.

MICROELECTRONIC ASSEMBLIES INCLUDING STIFFENERS AROUND INDIVIDUAL DIES

Disclosed herein are microelectronic assemblies, as well as related apparatuses and methods. In some embodiments, a microelectronic assembly may include a substrate; a lid surrounding an individual die, wherein the lid includes a planar portion and two or more sides extending from the planar portion, and wherein the individual die is electrically coupled to the substrate by interconnects; and a material surrounding the interconnects and coupling the two or more sides of the lid to the substrate.

BONDING STRUCTURE AND METHOD THEREOF
20230299028 · 2023-09-21 ·

A bonding method and a bonding structure are provided. A device substrate is provided including a plurality of semiconductor devices, wherein each of the semiconductor devices includes a first bonding layer. A cap substrate is provided including a plurality of cap structures, wherein each of the cap structures includes a second bonding layer, the second bonding layer having a planar surface and a first protrusion protruding from the planar surface. The device substrate is bonded to the cap substrate by engaging the first protrusion of the second bonding layer of each of the cap structures with the corresponding first bonding layer of each of the semiconductor devices in the device substrate.

Lid with Self Sealing Plug Allowing for a Thermal Interface Material with Fluidity in a Lidded Flip Chip Package
20230298965 · 2023-09-21 ·

The disclosure describes a lidded flip chip package allowing for a thermal interface material (TIM) with fluidity, like a liquid metal, including: a lid, a sealing ring for forming a sealed gap between a flip chip and the lid, a storage tunnel as a reservoir for accepting or releasing a liquid metal from or to the sealed gap, and an injection tunnel for filling a liquid metal into the sealed gap, wherein a self-sealing plug structure is integrated with the storage tunnel and the injection tunnel, the sealed gap is completely filled with a liquid metal, and a portion of the storage tunnel is filled with the same liquid metal and its remaining portion is filled with a gas. The disclosure also describes a method for filling a liquid metal into the lidded flip chip package based on the self-sealing plug structure.

SEMICONDUCTOR PACKAGE STRUCTURES AND METHODS OF FORMING THE SAME

A ring structure on a package substrate is divided into at least four different components, including a plurality of first pieces and a plurality of second pieces. By dividing the ring structure into at least four different components, the ring structure reduces flexibility of the package substrate, which thus reduces stress on a molding compound (e.g., in a range from approximately 1% to approximately 10%). As a result, molding cracking is reduced, which reduces defect rates and increases yield. Accordingly, raw materials, power, and processing resources are conserved that would otherwise be consumed with manufacturing additional packages when defect rates are higher.