An integrated circuit package that includes a liquid phase thermal interface material (TIM) is described. The package may include any number of die. The liquid phase TIM can be sealed in a chamber between a die and an integrated heat spreader and bounded on the sides by a perimeter layer. The liquid phase TIM can be fixed in place or circulated, depending on application. A thermal conductivity of the liquid phase TIM can be at least 15 Watts/meter-Kelvin, according to some embodiments. A liquid phase TIM eliminates failure mechanisms present in solid phase TIMs, such as cracking due to warpage and uncontained flow out of the module.

A semiconductor module includes a laminated substrate having an insulating plate, a circuit pattern arranged on an upper surface of the insulating plate and a heat dissipating plate arranged on a lower surface of the insulating plate. The semiconductor module also includes a semiconductor device having a collector electrode arranged on its upper surface, having an emitter electrode and a gate electrode arranged on its lower surface, and bumps respectively bonding the emitter electrode and the gate electrode to an upper surface of the circuit pattern. Each of the bumps is made of a metal sintered material such that the bump is formed to be constricted in its middle portion in a thickness direction orthogonal to a surface of the insulating plate.

A method is disclosed for producing a power semiconductor module that includes a substrate, at least one semiconductor body, a connecting element and a contact element. The method includes: arranging the substrate in a housing having walls; at least partly filling a capacity formed by the walls of the housing and the substrate with an encapsulation material; hardening the encapsulation material to form a hard encapsulation; and closing the housing, wherein the contact element extends from the connecting element through an interior of the housing and through an opening in a cover of the housing to an outside of the housing in a direction perpendicular to a first surface of a first metallization layer of the substrate.

A package structure includes a circuit substrate, a semiconductor package, a thermal interface material, a lid structure and a heat dissipation structure. The semiconductor package is disposed on and electrically connected to the circuit substrate. The thermal interface material is disposed on the semiconductor package. The lid structure is disposed on the circuit substrate and surrounding the semiconductor package, wherein the lid structure comprises a supporting part that is partially covering and in physical contact with the thermal interface material. The heat dissipation structure is disposed on the lid structure and in physical contact with the supporting part of the lid structure.

An electronic component comprising: an electronic substrate that includes an electronic element and a first connection terminal a package member that is disposed on the electronic substrate; and a circuit member that includes a second connection terminal, wherein the circuit member is disposed between the package member and the electronic substrate, and extends from the position between the package member and the electronic substrate outward beyond the edge of the electronic substrate; the electronic component includes a connecting member that is disposed between the circuit member and the electronic substrate, and electrically connects the second connection terminal and the first connection terminal, an adhesive member that is disposed between the circuit member and the package member, and joins the circuit member to the package member; the connecting member, the circuit member, and the adhesive member are located between the package member and the electronic substrate.

Embodiments include semiconductor packages and cooling semiconductor packaging systems. A semiconductor package includes a second die on a package substrate, first dies on the second die, conductive bumps between the first dies and the second die, a cold plate and a manifold over the first dies, second die, and package substrate, and first openings in the manifold. The first openings are fluidly coupled through the conductive bumps. The semiconductor package may include a first fluid path through the first openings of the manifold, where a first fluid flows through the first fluid path. The semiconductor package may further include a second fluid path through second openings of the cold plate, where a second fluid flows through the second fluid path, and where the first and second fluids of the first and second fluid paths cool heat providing surfaces of the first dies, the second die, or the package substrate.

An electronic component comprising: an electronic substrate that includes an electronic element and a first connection terminal a package member that is disposed on the electronic substrate; and a circuit member that includes a second connection terminal, wherein the circuit member is disposed between the package member and the electronic substrate, and extends from the position between the package member and the electronic substrate outward beyond the edge of the electronic substrate; the electronic component includes a connecting member that is disposed between the circuit member and the electronic substrate, and electrically connects the second connection terminal and the first connection terminal, an adhesive member that is disposed between the circuit member and the package member, and joins the circuit member to the package member; the connecting member, the circuit member, and the adhesive member are located between the package member and the electronic substrate.

Provided is a sequencing chip. The sequencing chip includes: a chip main body, nucleic acids, and a phosphonic acid polymer film. The chip main body includes a plurality of chip particles arranged in a same layer, the chip particles are obtained by cutting a chip matrix along cutting lines of a wafer layer, and the chip matrix includes: the wafer layer having the cutting lines uniformly distributed thereon; a first silicon oxide layer made of silicon oxide and formed on an upper surface of the wafer layer; and a transition metal oxide layer made of a transition metal oxide and formed on an upper surface of the first silicon oxide layer. The nucleic acids are fixed on the transition metal oxide layer; and the phosphonic acid polymer film is made of a polyphosphonic acid polymer and formed on an upper surface of the transition metal oxide layer.

A package structure is provided. The package structure includes a first package component, a second package component, and a lid structure. The first package component includes a plurality of integrated circuit dies and an underfill formed between the integrated circuit dies. The second package component includes a substrate, and the first package component is mounted on the substrate. The lid structure is disposed on the second package component and around the first package component, and the lid structure covers the integrated circuit dies and exposes the underfill.

A semiconductor device includes an integrated circuit attached to a chip carrier in a flip chip configuration. A substrate extends to a back surface of the integrated circuit, and an interconnect region extends to a front surface of the integrated circuit. A substrate bond pad is disposed at the front surface, and is electrically coupled through the interconnect region to the semiconductor material. The chip carrier includes a substrate lead at a front surface of the chip carrier. The substrate lead is electrically coupled to the substrate bond pad. An electrically conductive compression sheet is disposed on the back surface of the integrated circuit, with lower compression tips making electrical contact with the semiconductor material in the substrate. The electrically conductive compression sheet is electrically coupled to the substrate lead of the chip carrier by a back surface shunt disposed outside of the integrated circuit.