H01L2924/1659

Chip packages and methods of manufacture thereof

A chip package may include: a first die; at least one second die disposed over the first die; and a lid disposed over lateral portions of the first die and at least partially surrounding the at least one second die, the lid having inclined sidewalls spaced apart from and facing the at least one second die.

Semiconductor device having multiple bonded heat sinks

A method for manufacturing a semiconductor device is provided, the method including: mounting a first element on a wiring substrate, placing a first heat sink on the first element with a metal material interposed between the first heat sink and the first element, attaching the first heat sink to the first element via the metal material by heating and melting the metal material, and mounting a second element on the wiring substrate after the steps of attaching the first heat sink to the first element.

SEMICONDUCTOR DEVICE PACKAGE AND A METHOD OF MANUFACTURING THE SAME

A semiconductor device package includes a supporting element, a transparent plate disposed on the supporting element, a semiconductor device disposed under the transparent plate, and a lid surrounding the transparent plate. The supporting element and the transparent plate define a channel.

Lid with Self Sealing Plug Allowing for a Thermal Interface Material with Fluidity in a Lidded Flip Chip Package
20230298965 · 2023-09-21 ·

The disclosure describes a lidded flip chip package allowing for a thermal interface material (TIM) with fluidity, like a liquid metal, including: a lid, a sealing ring for forming a sealed gap between a flip chip and the lid, a storage tunnel as a reservoir for accepting or releasing a liquid metal from or to the sealed gap, and an injection tunnel for filling a liquid metal into the sealed gap, wherein a self-sealing plug structure is integrated with the storage tunnel and the injection tunnel, the sealed gap is completely filled with a liquid metal, and a portion of the storage tunnel is filled with the same liquid metal and its remaining portion is filled with a gas. The disclosure also describes a method for filling a liquid metal into the lidded flip chip package based on the self-sealing plug structure.

SEMICONDUCTOR PACKAGE STRUCTURES AND METHODS OF FORMING THE SAME

A ring structure on a package substrate is divided into at least four different components, including a plurality of first pieces and a plurality of second pieces. By dividing the ring structure into at least four different components, the ring structure reduces flexibility of the package substrate, which thus reduces stress on a molding compound (e.g., in a range from approximately 1% to approximately 10%). As a result, molding cracking is reduced, which reduces defect rates and increases yield. Accordingly, raw materials, power, and processing resources are conserved that would otherwise be consumed with manufacturing additional packages when defect rates are higher.

Semiconductor device package and a method of manufacturing the same

A semiconductor device package includes a supporting element, a transparent plate disposed on the supporting element, a semiconductor device disposed under the transparent plate, and a lid surrounding the transparent plate. The supporting element and the transparent plate define a channel.

Semiconductor Device and Method Forming Same

Package structures and methods of forming package structures are discussed. A package structure, in accordance with some embodiments, includes a package component with one or more integrated circuits adhered to a package substrate, a hybrid thermal interface material utilizing a combination of polymer based material with high elongation values and metal based material with high thermal conductivity values. The polymer based thermal interface material placed on the edge of the package component contains the metal based thermal interface material in liquid form.

STACKED SEMICONDUCTOR DIE ASSEMBLIES WITH PARTITIONED LOGIC AND ASSOCIATED SYSTEMS AND METHODS
20210217734 · 2021-07-15 ·

Stacked semiconductor die assemblies having memory dies stacked between partitioned logic dies and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die assembly can include a first logic die, a second logic die, and a thermally conductive casing defining an enclosure. The stack of memory dies can be disposed within the enclosure and between the first and second logic dies.

SEMICONDUCTOR DEVICE PACKAGE CONTAINING A MEMS DEVICE AND METHOD FOR MANUFACTURING THE SAME

A semiconductor device package includes a substrate, a lid, a MEMS device and a gel. The lid is disposed on the substrate and defines a cavity together with the substrate. The MEMS device is disposed in the cavity. The gel covers the MEMS component. The lid is attached to the substrate through a silicone-based adhesive.

ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF

An electronic package is provided, in which a package module and a shielding member are disposed on a carrier structure, such that the shielding member covers a top surface and side surfaces of the package module to block the radiation outward from the package module and prevent problem that other electronic components on the carrier structure cannot be transmitted signals normally due to the electromagnetic interference of the package module.