A plurality of lead pins (2a-d) penetrates through a stem (1) having a circular shape and includes a signal lead pin (2a,2b). A block (4) is provided on an upper surface of the stem. A waveguide light receiving device (9) is provided on a side surface of the block. An amplifier (6) is provided on the side surface of the block and amplifies an electric signal output from the waveguide light receiving device. A first relay substrate is provided on the upper surface of the stem and arranged between the block and the signal lead pin. A first transmission line (12a,12b) is provided on the first relay substrate. A first wire (10f,10g) connects one end of the first transmission line and an output terminal of the amplifier. A second wire (10h,10i) connects the other end of the first transmission line (12a,12b) and the signal lead pin.

Photo-emitting and/or photo-receiving diode array device, comprising: a stack of first and second semiconductor layers doped according to different types; first trenches passing through the stack and surrounding a region of the stack wherein several diodes are formed; dielectric portions arranged in the first trenches and covering lateral flanks of said region over the entire thickness of the second layer and a first part of the thickness of the first layer; first electrically conductive portions arranged in the first trenches and covering the lateral flanks of said region over a second part of the thickness of the first layer, and forming first electrodes of the diodes of said region; at least one second trench partially passing through the first layer and separating the portions of the first layer from the diodes of said region.

A unit cell for use in an optical active pixel sensor (APS) includes a photodiode having a first terminal connected to a photodiode biasing PDB line, and a second terminal opposite from the first terminal; a reset switch transistor having a first terminal connected to the second terminal of the photodiode, and a second terminal connected to a reference voltage line, and a gate of the reset switch transistor is connected to a reset signal RST supply line; and an amplification transistor having a first terminal connected to an output readout line, and a second terminal connected to a driving voltage supply line, and a gate of the amplification transistor is connected to a node constituting the connection of the second terminal of the photodiode and the first terminal of the reset switch transistor. An optical APS device includes a sensor matrix formed of a plurality of unit cells according to any of the embodiments arranged in an array of rows and columns.

An image sensor includes: a pixel substrate that includes a plurality of pixels each having a photoelectric conversion unit that generates an electric charge through photoelectric conversion executed on light having entered therein and an output unit that generates a signal based upon the electric charge and outputs the signal; and an arithmetic operation substrate that is laminated on the pixel substrate and includes an operation unit that generates a corrected signal by using a reset signal generated after the electric charge in the output unit is reset and a photoelectric conversion signal generated based upon an electric charge generated in the photoelectric conversion unit and executes an arithmetic operation by using corrected signals each generated in correspondence to one of the pixels.

A wiring base includes a base having a first surface, at least one metal layer positioned on the first surface, at least one lead terminal positioned on the metal layer, and a joining member that is positioned on the metal layer and joins the lead terminal to the metal layer. The lead terminal has a first portion to be in contact with the joining member and also has a second portion being continuous with the first portion. In a cross section of the lead terminal orthogonal to a longitudinal direction of the lead terminal, the first portion has two concave surfaces that are formed near the metal layer so as to be disposed opposite to each other across a center in a transverse direction of the lead terminal.

The present disclosure provides an electronic package. The electronic package includes a substrate, a first electronic component, an encapsulant, and a shielding layer. The substrate has a first upper surface, a second upper surface, and a first lateral surface extending between the first upper surface and the second upper surface. The first electronic component is disposed on the substrate. The encapsulant coves the first electronic component and the first lateral surface of the substrate. The shielding layer covers the encapsulant. The shielding layer is spaced apart from the first lateral surface of the substrate.

An optoelectronic semiconductor component includes an optoelectronic semiconductor chip; and an electrical connection point that contacts the optoelectronic semiconductor chip, wherein the electrical connection point covers the optoelectronic semiconductor chip on the bottom thereof at least in some areas, the electrical connection point includes a contact layer facing toward the optoelectronic semiconductor chip, the electrical connection point includes at least one barrier layer arranged on a side of the contact layer facing away from the optoelectronic semiconductor chip, the electrical connection point includes a protective layer arranged on the side of the at least one barrier layer facing away from the contact layer, the layers of the electrical connection point are arranged one on top of another along a stack direction, and the stack direction runs perpendicular to a main extension plane of the optoelectronic semiconductor chip.

A functional panel is provided. The functional panel includes a first substrate, a second substrate, a bonding layer, a functional element, a protective layer, and a terminal. The bonding layer is positioned between the first and second substrates. The functional element is surrounded by the first substrate, the second substrate, and the bonding layer. The terminal is electrically connected to the functional element and provided not to overlap with one of the first and second substrates. The protective layer is provided to be in contact with side surfaces of the first and second substrates and an exposed surface of the bonding layer. A surface of the terminal is partly exposed without being covered with the protective layer. The surface of the terminal partly includes a material having a lower ionization tendency than hydrogen.

A sensing device includes a substrate, two chips, and a shielding structure. The two chips are respectively defined as an emitting chip and a receiving chip. The emitting chip can emit a sensing light beam, the receiving chip can receive the sensing light beam, and the two chips are fixed in position on the substrate at intervals. At least one of the chips is electrically connected to the substrate through at least one wire, and a position where the wire is connected to the substrate is located between the two chips. The shielding structure is formed on the substrate. The shielding structure is located between the two chips, and the shielding structure covers the wire and a portion of the chip connected to the wire. Compared with the conventional photo-plethysmography sensor, the sensing device has the advantage of a smaller size.

Structures for an optical fiber groove and methods of forming a structure for an optical fiber groove. A photonics chip includes a substrate and an interconnect structure over the substrate. The photonics chip has a first exterior corner, a second exterior corner, and a side edge extending from the first exterior corner to the second exterior corner. The substrate includes a groove positioned along the side edge between the first exterior corner and the second exterior corner. The groove is arranged to intersect the side edge at a groove corner, and the interconnect structure includes metal structures adjacent to the first groove corner. The metal structures extend diagonally in the interconnect structure relative to the side edge of the photonics chip.