Patent classifications
H01L31/0203
LIGHT RECEIVING MODULE
A plurality of lead pins (2a-d) penetrates through a stem (1) having a circular shape and includes a signal lead pin (2a,2b). A block (4) is provided on an upper surface of the stem. A waveguide light receiving device (9) is provided on a side surface of the block. An amplifier (6) is provided on the side surface of the block and amplifies an electric signal output from the waveguide light receiving device. A first relay substrate is provided on the upper surface of the stem and arranged between the block and the signal lead pin. A first transmission line (12a,12b) is provided on the first relay substrate. A first wire (10f,10g) connects one end of the first transmission line and an output terminal of the amplifier. A second wire (10h,10i) connects the other end of the first transmission line (12a,12b) and the signal lead pin.
LIGHT RECEIVING MODULE
A plurality of lead pins (2a-d) penetrates through a stem (1) having a circular shape and includes a signal lead pin (2a,2b). A block (4) is provided on an upper surface of the stem. A waveguide light receiving device (9) is provided on a side surface of the block. An amplifier (6) is provided on the side surface of the block and amplifies an electric signal output from the waveguide light receiving device. A first relay substrate is provided on the upper surface of the stem and arranged between the block and the signal lead pin. A first transmission line (12a,12b) is provided on the first relay substrate. A first wire (10f,10g) connects one end of the first transmission line and an output terminal of the amplifier. A second wire (10h,10i) connects the other end of the first transmission line (12a,12b) and the signal lead pin.
WIRING BASE, PACKAGE FOR STORING SEMICONDUCTOR ELEMENT, AND SEMICONDUCTOR DEVICE
A wiring base includes a base having a first surface, at least one metal layer positioned on the first surface, at least one lead terminal positioned on the metal layer, and a joining member that is positioned on the metal layer and joins the lead terminal to the metal layer. The lead terminal has a first portion to be in contact with the joining member and also has a second portion being continuous with the first portion. In a cross section of the lead terminal orthogonal to a longitudinal direction of the lead terminal, the first portion has two concave surfaces that are formed near the metal layer so as to be disposed opposite to each other across a center in a transverse direction of the lead terminal.
WIRING BASE, PACKAGE FOR STORING SEMICONDUCTOR ELEMENT, AND SEMICONDUCTOR DEVICE
A wiring base includes a base having a first surface, at least one metal layer positioned on the first surface, at least one lead terminal positioned on the metal layer, and a joining member that is positioned on the metal layer and joins the lead terminal to the metal layer. The lead terminal has a first portion to be in contact with the joining member and also has a second portion being continuous with the first portion. In a cross section of the lead terminal orthogonal to a longitudinal direction of the lead terminal, the first portion has two concave surfaces that are formed near the metal layer so as to be disposed opposite to each other across a center in a transverse direction of the lead terminal.
Fabrication of thin-film encapsulation layer for light-emitting device
An ink jet process is used to deposit a material layer to a desired thickness. Layout data is converted to per-cell grayscale values, each representing ink volume to be locally delivered. The grayscale values are used to generate a halftone pattern to deliver variable ink volume (and thickness) to the substrate. The halftoning provides for a relatively continuous layer (e.g., without unintended gaps or holes) while providing for variable volume and, thus, contributes to variable ink/material buildup to achieve desired thickness. The ink is jetted as liquid or aerosol that suspends material used to form the material layer, for example, an organic material used to form an encapsulation layer for a flat panel device. The deposited layer is then cured or otherwise finished to complete the process.
Fabrication of thin-film encapsulation layer for light-emitting device
An ink jet process is used to deposit a material layer to a desired thickness. Layout data is converted to per-cell grayscale values, each representing ink volume to be locally delivered. The grayscale values are used to generate a halftone pattern to deliver variable ink volume (and thickness) to the substrate. The halftoning provides for a relatively continuous layer (e.g., without unintended gaps or holes) while providing for variable volume and, thus, contributes to variable ink/material buildup to achieve desired thickness. The ink is jetted as liquid or aerosol that suspends material used to form the material layer, for example, an organic material used to form an encapsulation layer for a flat panel device. The deposited layer is then cured or otherwise finished to complete the process.
SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
The present disclosure provides an electronic package. The electronic package includes a substrate, a first electronic component, an encapsulant, and a shielding layer. The substrate has a first upper surface, a second upper surface, and a first lateral surface extending between the first upper surface and the second upper surface. The first electronic component is disposed on the substrate. The encapsulant coves the first electronic component and the first lateral surface of the substrate. The shielding layer covers the encapsulant. The shielding layer is spaced apart from the first lateral surface of the substrate.
SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
The present disclosure provides an electronic package. The electronic package includes a substrate, a first electronic component, an encapsulant, and a shielding layer. The substrate has a first upper surface, a second upper surface, and a first lateral surface extending between the first upper surface and the second upper surface. The first electronic component is disposed on the substrate. The encapsulant coves the first electronic component and the first lateral surface of the substrate. The shielding layer covers the encapsulant. The shielding layer is spaced apart from the first lateral surface of the substrate.
Image sensor having improved dicing properties
The present technology relates to techniques of preventing intrusion of moisture into a chip. Various illustrative embodiments include image sensors that include: a substrate; a plurality of layers stacked on the substrate; the plurality of layers including a photodiode layer having a plurality of photodiodes formed on a surface of the photodiode layer; the plurality of layers including at least one layer having a groove formed such that a portion of the at least one layer is excavated; and a transparent resin layer formed above the photodiode layer and formed in the groove. The present technology can be applied to, for example, an image sensor.
OPTICAL-SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A method for manufacturing an optical-semiconductor device, including forming a plurality of first and second electrically conductive members that are disposed separately from each other on a support substrate; providing a base member formed from a light blocking resin between the first and second electrically conductive members; mounting an optical-semiconductor element on the first and/or second electrically conductive member; covering the optical-semiconductor element by a sealing member formed from a translucent resin; and obtaining individual optical-semiconductor devices after removing the support substrate.