Patent classifications
H01L31/02325
DETECTION DEVICE
A detection device includes a substrate, a light-emitter, and a light receiver. The substrate includes a first surface area and a second surface area, in which the first surface area has a first reflectance greater than a second reflectance of the second surface area. The light emitter is disposed on the first surface area, and the light receiver is disposed on the second surface area. The light receiver has a third reflectance which is substantially the same as the second reflectance of the second surface area.
Optical package assembly and mobile terminal
Disclosed is an optical package assembly. The optical package assembly includes a substrate (100), a light sensor chip (200), and a protection portion. The protection portion and the light sensor chip (200) both are fixed to the substrate (100), the light sensor chip (200) is packaged in the protection portion, a plane on which the light sensor chip (200) is located intersects with a plane of the substrate (100), and the protection portion includes a light entering region. Further disclosed is a mobile terminal.
Photonic detector coupled with a dielectric resonator antenna
An apparatus for light detection includes a light, or photon, detector assembly and a dielectric resonator layer coupled to the detector assembly. The dielectric resonator layer is configured to receive transmission of incident light that is directed into the detector assembly by the dielectric resonator layer. The dielectric resonator layer resonates with a range of wavelengths of the incident light.
Imaging device and solid-state imaging device
An artifact caused by secondary reflection is reduced. An imaging device according to an embodiment includes: a diffuser (110) that converts incident light into scattered light whose diameter is expanded in accordance with a propagation distance and outputs the scattered light; and a light receiver (132) that converts light diffused by the diffuser into an electric signal.
Semiconductor structure having group III-V device on group IV substrate and contacts with liner stacks
A semiconductor structure includes a group IV substrate and a patterned group III-V device over the group IV substrate. A blanket dielectric layer is situated over the patterned group III-V device. Contact holes in the blanket dielectric layer are situated over the patterned group III-V device. A liner stack having at least one metal liner is situated in each contact hole. Filler metals are situated over each liner stack and fill the contact holes. The patterned group III-V device can be optically and/or electrically connected to group IV devices in the group IV substrate.
Semiconductor devices and methods of manufacturing semiconductor devices
In one example, a semiconductor device comprises a spacer substrate, a first lens substrate over the first spacer substrate, and a lens protector over the first lens dielectric adjacent to the first lens. The spacer substrate comprises a spacer dielectric, a spacer top terminal, a spacer bottom terminal, and a spacer via. The first lens substrate comprises a first lens dielectric, a first lens, a first lens top terminal, a first lens bottom terminal, and a first lens via. A first interconnect is coupled with the spacer top terminal and the first lens bottom terminal. Other examples and related methods are also disclosed herein.
Optical neuro-mimetic devices
The present disclosure relates to semiconductor structures and, more particularly, to optical neuro-mimetic devices and methods of manufacture. The structure includes: a plurality of photodetectors and electrical circuitry that converts photocurrent generated from the photodetectors into electrical current and then sums up the electrical current to mimic neural functionality.
IMAGE SENSOR WITH PHOTOSENSITIVITY ENHANCEMENT REGION
The present disclosure relates to an image sensor including a pixel along a substrate. The pixel includes a first semiconductor region having a first doping type. A second semiconductor region is directly over the first semiconductor region. The second semiconductor region has a second doping type opposite the first doping type and meets the first semiconductor region at a p-n junction. A ring-shaped third semiconductor region laterally surrounds the first and second semiconductor regions. The ring-shaped third semiconductor region has the first doping type. A ring-shaped fourth semiconductor region laterally surrounds the ring-shaped third semiconductor region. The ring-shaped fourth semiconductor region has the second doping type. A ring-shaped fifth semiconductor region is directly over the ring-shaped third semiconductor region and has the second doping type.
Light detection device and electronic apparatus comprising plural SPAD arrays with a photon detection rate controller
A first SPAD array on which at least one first light beam that is at least one pulse light beam is incident and which is operated in Geiger mode, a second SPAD array on which at least one second light beam resulting from the at least one first light beam reflected by a detection object is incident and which is operated in Geiger mode, a voltage generation unit that applies a reverse bias voltage to the first SPAD array and the second SPAD array, and a SPAD photon detection rate controller that adjusts and controls a SPAD photon detection rate in accordance with a first photon detection rate indicating a rate of the number of at least one pulse signal output by the second SPAD array upon incidence of the at least one second light beam relative to the number of the at least one pulse light beam are included.
Photonic Semiconductor Device and Method of Manufacture
A package includes an interposer structure including a first via; a first interconnect device including conductive routing and which is free of active devices; an encapsulant surrounding the first via and the first interconnect device; and a first interconnect structure over the encapsulant and connected to the first via and the first interconnect device; a first semiconductor die bonded to the first interconnect structure and electrically connected to the first interconnect device; and a first photonic package bonded to the first interconnect structure and electrically connected to the first semiconductor die through the first interconnect device, wherein the first photonic package includes a photonic routing structure including a waveguide on a substrate; a second interconnect structure over the photonic routing structure, the second interconnect structure including conductive features and dielectric layers; and an electronic die bonded to and electrically connected to the second interconnect structure.