A bonded semiconductor light-receiving device including an epitaxial layer to serve as a device-functional layer, and a support substrate made of a material different from that of the device-functional layer and bonded to the epitaxial layer via a bonding material layer. The device-functional layer has a bonding surface with an uneven pattern formed thereon.

Techniques for enhancing the absorption of photons in semiconductors with the use of microstructures are described. The microstructures, such as pillars and/or holes, effectively increase the effective absorption length resulting in a greater absorption of the photons. Using microstructures for absorption enhancement for silicon photodiodes and silicon avalanche photodiodes can result in bandwidths in excess of 10 Gb/s at photons with wavelengths of 850 nm, and with quantum efficiencies of approximately 90% or more.

A back contact structure of a solar cell, includes: a silicon substrate, the silicon substrate including a back surface including a plurality of recesses disposed at intervals; a plurality of first conductive regions and a plurality of second conductive regions disposed alternately in the plurality of recesses, where each first conductive region includes a first dielectric layer and a first doped region which are disposed successively in the plurality of recesses, and each second conductive region includes a second doped region; a second dielectric layer disposed between the plurality of first conductive regions and the plurality of second conductive regions; and a conductive layer disposed on the plurality of first conductive regions and the plurality of second conductive regions.

An embodiment includes a method of texturing a semiconductor substrate, a semiconductor substrate manufactured using the method, and a solar cell including the semiconductor substrate, the method including: forming metal nanoparticles on a semiconductor substrate, primarily etching the semiconductor substrate, removing the metal nanoparticles, and secondarily etching the primarily etched semiconductor substrate to form nanostructures.

A back contact structure of a solar cell, includes: a silicon substrate, the silicon substrate including a back surface including a plurality of recesses disposed at intervals; a plurality of first conductive regions and a plurality of second conductive regions disposed alternately in the plurality of recesses, where each first conductive region includes a first dielectric layer and a first doped region which are disposed successively in the plurality of recesses, and each second conductive region includes a second doped region; a second dielectric layer disposed between the plurality of first conductive regions and the plurality of second conductive regions; and a conductive layer disposed on the plurality of first conductive regions and the plurality of second conductive regions.

A back contact structure includes: a silicon substrate including a back surface including a plurality of recesses disposed at intervals; a plurality of first conductive regions and a plurality of second conductive regions disposed alternately on the back surface of the silicon substrate; a second dielectric layer disposed between the plurality of first conductive regions and the plurality of second conductive regions; and a conductive layer disposed on the plurality of first conductive regions and the plurality of second conductive regions. One of the plurality of first conductive regions and the plurality of second conductive regions is disposed inside the plurality of recesses, respectively, and the other one is disposed outside the plurality of recesses; each first conductive region includes a first dielectric layer and a first doped region which are disposed successively, and each second conductive region includes a second doped region.

Disclosed is a solar cell. The solar cell includes a semiconductor substrate, conductivity-type regions located in or on the semiconductor substrate, electrodes conductively connected to the conductivity-type regions, and insulating films located on at least one of opposite surfaces of the semiconductor substrate, and including a first film and a second film located on the first film, the second film has a higher carbon content than that of the first film, a refractive index of the second film is equal to or less than a refractive index of the first film, and an extinction coefficient of the second film is equal to or greater than an extinction coefficient of the first film.

The present invention relates to an optoelectronic device comprising a substrate having a first and a second substantially planar face, a series of grooves in the first substantially planar face, and a first and a second electrical conductor on the second substantially planar face; wherein a first face of the first electrical conductor and a first face of the second electrical conductor are reflective.

There are provided a solid-state imaging device capable of improving quantum efficiency while suppressing occurrence of color mixture, and a method of manufacturing such a solid-state imaging device. According to the present disclosure, a solid-state imaging device (100, 100a, 100b, 100c) is provided. The solid-state imaging device (100, 100a, 100b, 100c) includes a first region (4, 4a, 4b) and a second region (5, 5a) in a light receiving surface of an imaging pixel (1, 1a, 1b, 1c). The first region (4, 4a, 4b) is provided with unevenness. The second region (5, 5a) is provided with unevenness having a pitch narrower than that of the unevenness in the first region (4, 4a, 4b).

To provide a light receiving element including: a photoelectric conversion unit (PD) that is provided in a semiconductor substrate and converts light into a charge; a first charge accumulation unit (MEM) to which the charge is transferred from the photoelectric conversion unit; a second charge accumulation unit (MEM) to which the charge is transferred from the photoelectric conversion unit, in which each of the first and second charge accumulation units includes a stack of an electrode, a first insulating layer, and a semiconductor layer.