Provided are a solar cell, a manufacturing method thereof, and a photovoltaic module. The solar cell includes: a semiconductor substrate, in which a rear surface of the semiconductor substrate having a first texture structure, the first texture structure includes two or more first substructures at least partially stacked on one another, and in a direction away from the rear surface and perpendicular to the rear surface, a distance between a top surface of an outermost first substructure and a top surface of an adjacent first substructure being less than or equal to 2 μm; a first passivation layer located on a front surface of the semiconductor substrate; a tunnel oxide layer located on the first texture structure; a doped conductive layer located on a surface of the tunnel oxide layer; and a second passivation layer located on a surface of the doped conductive layer.

Provided are a solar cell, a manufacturing method thereof, and a photovoltaic module. The solar cell includes: a semiconductor substrate, in which a rear surface of the semiconductor substrate having a first texture structure, the first texture structure includes two or more first substructures at least partially stacked on one another, and in a direction away from the rear surface and perpendicular to the rear surface, a distance between a top surface of an outermost first substructure and a top surface of an adjacent first substructure being less than or equal to 2μm; a first passivation layer located on a front surface of the semiconductor substrate; a tunnel oxide layer located on the first texture structure; a doped conductive layer located on a surface of the tunnel oxide layer; and a second passivation layer located on a surface of the doped conductive layer.

Discussed is a solar cell including a first conductive region positioned at a front surface of a semiconductor substrate and containing impurities of a first conductivity type or a second conductivity type, a second conductive region positioned at a back surface of the semiconductor substrate and containing impurities of a conductivity type opposite a conductivity type of impurities of the first conductive region, a first electrode positioned on the front surface of the semiconductor substrate and connected to the first conductive region, and a second electrode positioned on the back surface of the semiconductor substrate and connected to the second conductive region. Each of the first and second electrodes includes metal particles and a glass frit.

A method for manufacturing high efficiency solar cells is disclosed. The method comprises providing a thin dielectric layer and a doped polysilicon layer on the back side of a silicon substrate. Subsequently, a high quality oxide layer and a wide band gap doped semiconductor layer can both be formed on the back and front sides of the silicon substrate. A metallization process to plate metal fingers onto the doped polysilicon layer through contact openings can then be performed. The plated metal fingers can form a first metal gridline. A second metal gridline can be formed by directly plating metal to an emitter region on the back side of the silicon substrate, eliminating the need for contact openings for the second metal gridline. Among the advantages, the method for manufacture provides decreased thermal processes, decreased etching steps, increased efficiency and a simplified procedure for the manufacture of high efficiency solar cells.

Embodiments of the present disclosure provide a solar cell and a solar cell module. The solar cell includes a first region and a second region, and further includes a substrate having a first surface and a second surface; a tunneling layer covering the second surface; a first emitter disposed on part of the tunneling layer in the first region; and a second emitter disposed on part of the tunneling layer in the second region and on the first emitter, a conductivity type of the second emitter being different from a conductivity type of the first emitter. The solar cell further includes a first electrode disposed in the first region and configured to electrically connect with the first emitter by penetrating through the second emitter; and a second electrode disposed in the second region and configured to electrically connect with the second emitter.

The present invention relates to a photoelectric film and a fabrication method thereof, and in particular, to a layered polycrystalline lead selenide (PbSe) film and a fabrication method thereof. The fabrication method mainly includes: (1) fabricating a dense PbSe layer on a substrate through chemical bath deposition (CBD); (2) fabricating a loose plumbonacrite (Pb.sub.10O(OH).sub.6(CO.sub.3).sub.6) layer on the dense PbSe layer through CBD; (3) placing a sample with the dense PbSe layer and the Pb.sub.10O(OH).sub.6(CO.sub.3).sub.6 layer in a selenium ion-containing solution to allow an ion exchange reaction to finally form the layered polycrystalline PbSe film. The fabrication method has the advantages of simple process, low cost, and high controllability. The PbSe film fabricated by the method is composed of a lower dense polycrystalline cubic PbSe layer and an upper loose polycrystalline cubic PbSe layer, which can be widely used in the fabrication of components in the field of photoelectric conversion or thermoelectric conversion, such as infrared (IR) sensors, solar cells, laser emitters, and thermoelectric converters.

The present invention relates to a photoelectric film and a fabrication method thereof, and in particular, to a layered polycrystalline lead selenide (PbSe) film and a fabrication method thereof. The fabrication method mainly includes: (1) fabricating a dense PbSe layer on a substrate through chemical bath deposition (CBD); (2) fabricating a loose plumbonacrite (Pb.sub.10O(OH).sub.6(CO.sub.3).sub.6) layer on the dense PbSe layer through CBD; (3) placing a sample with the dense PbSe layer and the Pb.sub.10O(OH).sub.6(CO.sub.3).sub.6 layer in a selenium ion-containing solution to allow an ion exchange reaction to finally form the layered polycrystalline PbSe film. The fabrication method has the advantages of simple process, low cost, and high controllability. The PbSe film fabricated by the method is composed of a lower dense polycrystalline cubic PbSe layer and an upper loose polycrystalline cubic PbSe layer, which can be widely used in the fabrication of components in the field of photoelectric conversion or thermoelectric conversion, such as infrared (IR) sensors, solar cells, laser emitters, and thermoelectric converters.

A solar cell can include a built-in bypass diode. In one embodiment, the solar cell can include an active region disposed in or above a first portion of a substrate and a bypass diode disposed in or above a second portion of the substrate. The first and second portions of the substrate can be physically separated with a groove. A metallization structure can couple the active region to the bypass diode.

A fluid sensor includes a substrate having a top main surface region, wherein the top main surface region of the substrate forms a common system plane of the fluid sensor, a thermal radiation emitter on the top main surface region of the substrate, an optical filter structure on the top main surface region of the substrate, a waveguide on the main top surface region of the substrate, and a thermal radiation detector on the top main surface region of the substrate, wherein the thermal radiation detector provides a detector output signal based on a radiation strength of the filtered thermal radiation received from the waveguide.

Methods of fabricating solar cell emitter regions with differentiated P-type and N-type regions architectures, and resulting solar cells, are described. In an example, a back contact solar cell includes a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed on the back surface of the substrate. A third thin dielectric layer is disposed laterally directly between the first and second polycrystalline silicon emitter regions. A first conductive contact structure is disposed on the first polycrystalline silicon emitter region. A second conductive contact structure is disposed on the second polycrystalline silicon emitter region.