H01L31/202

PHOTOVOLTAIC DEVICE, PHOTOVOLTAIC MODULE, AND METHOD FOR FABRICATING THE PHOTOVOLTAIC DEVICE
20180006168 · 2018-01-04 ·

A photovoltaic device includes: a silicon substrate having a front surface having a texture; and an amorphous silicon layer having an uneven surface corresponding to the texture, wherein the amorphous silicon layer is amorphous in peak portions and slope portions extending between the peak portions and valley portions of the uneven surface, and has crystalline regions which grow, in a pillar manner, approximately perpendicularly from a substrate surface of the silicon substrate in the valley portions, the crystalline regions being discretely present along upper ends of the valley portions, the upper ends being opposite lower ends of the valley portions, the lower ends being in contact with the silicon substrate, wherein coverage of the crystalline regions in the valley portions is higher than coverage of amorphous regions in the valley portions.

SOLAR CELL
20180013021 · 2018-01-11 ·

A solar cell includes: a semiconductor substrate formed of n-type crystalline silicon; a first stack formed of amorphous silicon in a first region on a first principle surface of the semiconductor substrate; a second stack formed of amorphous silicon in a second region different from the first region on the first principle surface; and a third stack formed of amorphous silicon on a second principle surface of the semiconductor substrate opposite from the first principle surface. The second stack has an oxygen concentration that is higher than that of the first stack.

HYBRID POLYSILICON HETEROJUNCTION BACK CONTACT CELL
20230238471 · 2023-07-27 ·

A method for manufacturing high efficiency solar cells is disclosed. The method comprises providing a thin dielectric layer and a doped polysilicon layer on the back side of a silicon substrate. Subsequently, a high quality oxide layer and a wide band gap doped semiconductor layer can both be formed on the back and front sides of the silicon substrate. A metallization process to plate metal fingers onto the doped polysilicon layer through contact openings can then be performed. The plated metal fingers can form a first metal gridline. A second metal gridline can be formed by directly plating metal to an emitter region on the back side of the silicon substrate, eliminating the need for contact openings for the second metal gridline. Among the advantages, the method for manufacture provides decreased thermal processes, decreased etching steps, increased efficiency and a simplified procedure for the manufacture of high efficiency solar cells.

SOLAR CELL, MULTI-JUNCTION SOLAR CELL, AND METHOD OF MANUFACTURING SOLAR CELL

A solar cell includes: an n-type first amorphous silicon layer provided on a first main surface of a crystalline silicon substrate; an amorphous silicon oxide layer provided on a first main surface of the first amorphous silicon layer; and an n-type fine crystal silicon layer provided on a first main surface of the amorphous silicon oxide layer. An oxygen atom concentration in the first amorphous silicon layer, the amorphous silicon oxide layer, and the fine crystal silicon layer has a maximum value in the amorphous silicon oxide layer with a thickness direction.

Photosensitive Sensor, Manufacturing Method Thereof, and Display Panel
20220384670 · 2022-12-01 ·

A photosensitive sensor, a manufacturing method thereof and a display panel are provided. The photosensitive sensor includes a first type semiconductor layer, an intrinsic semiconductor layer disposed on a side of the first type semiconductor layer, and a second type semiconductor layer disposed on a side of the intrinsic semiconductor layer away from the first type semiconductor layer. The intrinsic semiconductor layer is provided with metal particles capable of generating a surface plasmon effect. The metal particles are dispersely distributed in the intrinsic semiconductor layer.

Solar cell emitter region fabrication with differentiated P-type and N-type region architectures

Methods of fabricating solar cell emitter regions with differentiated P-type and N-type regions architectures, and resulting solar cells, are described. In an example, a back contact solar cell includes a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed on the back surface of the substrate. A third thin dielectric layer is disposed laterally directly between the first and second polycrystalline silicon emitter regions. A first conductive contact structure is disposed on the first polycrystalline silicon emitter region. A second conductive contact structure is disposed on the second polycrystalline silicon emitter region.

Methods and apparatus for reducing as-deposited and metastable defects in Amorphousilicon
11502217 · 2022-11-15 ·

A method and apparatus for reducing as-deposited and metastable defects relative to amorphous silicon (a-Si) thin films, its alloys and devices fabricated therefrom that include heating an earth shield positioned around a cathode in a parallel plate plasma chemical vapor deposition chamber to control a temperature of a showerhead in the deposition chamber in the range of 350° C. to 600° C. An anode in the deposition chamber is cooled to maintain a temperature in the range of 50° C. to 450° C. at the substrate that is positioned at the anode. In the apparatus, a heater is embedded within the earth shield and a cooling system is embedded within the anode.

PHOTODIODE, MANUFACTURING METHOD THEREOF, AND DISPLAY SCREEN

The present disclosure provides a photodiode, a manufacturing method thereof, and a display screen. The photodiode includes: a first electrode including a first sub-part and a second sub-part disposed at an interval, wherein the second sub-part includes a first end and a second end; a connecting part disposed on the first sub-part, the first end, and a substrate corresponding to a gap between the first sub-part and the second sub-part; and a light converting part and a second electrode disposed on the second end in sequence.

LARGE CELL SHEETS, SOLAR CELLS, SHINGLED SOLAR MODULE, AND MANUFACTURING METHOD THEREOF
20230097957 · 2023-03-30 ·

The present disclosure relates to large cell sheets, solar cells, shingled solar modules, and manufacturing method thereof. A top surface of a boundary portion of units of the large cell sheet is divided into a cutting area, top surface bonding areas and top surface electrically-conductive contact areas. The cutting area is configured in a way that the large cell sheet can be cut along the cutting area; the top surface bonding areas and the top surface electrically-conductive contact areas are provided alternately, the cutting area and the top surface electrically-conductive contact areas are formed as an overlapping edge of the solar cell, and after the splitting of the large cell sheet, the top surface electrically-conductive contact areas can directly contact the bottom surface of another solar cell to achieve electrically-conductive connection. The large cell sheet according to the present disclosure can be split conveniently, and the individual solar cells are provided with dedicated bonding areas and electrically-conductive contact areas. Such an arrangement can optimize the production process and use performance of the solar cells.

SOLAR CELL AND METHOD FOR PRODUCING SOLAR CELL
20230088906 · 2023-03-23 · ·

A solar cell comprising a semiconductor substrate, first semiconductor layers, second semiconductor layers, a band-like first base electrode stacked on the first semiconductor layer, a band-like second base electrode stacked on the second semiconductor layer, a first electrode insulation stacked on the first base electrodes, a second electrode insulation stacked on the second base electrodes, an intermediate insulation stacked on a region of the first semiconductor layer in which the first base electrode is not stacked, and a region of the second semiconductor layer in which the second base electrode is not stacked, a first current collector stacked to span the second electrode insulation and the intermediate insulation, and a second current collector stacked to span the first electrode insulation and the intermediate insulation.