Patent classifications
H01L39/10
Impedance matched superconducting nanowire photodetector for single- and multi-photon detection
Conventional readout of a superconducting nanowire single-photon detector (SNSPD) sets an upper bound on the output voltage to be the product of the bias current and the load impedance, I.sub.B×Z.sub.load, where Z.sub.load is limited to 50Ω in standard RF electronics. This limit is broken/exceeded by interfacing the 50Ω load and the SNSPD using an integrated superconducting transmission line taper. The taper is a transformer that effectively loads the SNSPD with high impedance without latching. The taper increases the amplitude of the detector output while preserving the fast rising edge. Using a taper with a starting width of 500 nm, a 3.6× higher pulse amplitude, 3.7× faster slew rate, and 25.1 ps smaller timing jitter was observed. The taper also makes the detector's output voltage sensitive to the number of photon-induced hotspots and enables photon number resolution.
Majorana fermion quantum computing devices with charge sensing fabricated with ion implant methods
A quantum computing device is fabricated by forming, on a superconductor layer, a first resist pattern defining a device region and a sensing region within the device region. The superconductor layer within the sensing region is removed, exposing a region of an underlying semiconductor layer outside the device region. The exposed region of the semiconductor layer is implanted, forming an isolation region surrounding the device region. Using an etching process subsequent to the implanting, the sensing region and a portion of the device region of the superconductor layer adjacent to the isolation region are exposed. By depositing a first metal layer within the sensing region, a tunnel junction gate is formed. A reflectrometry wire comprising a second metal within the reflectrometry region is formed. A nanorod contact using the second metal within the portion of the device region outside the sensing region is formed.
INTERFACING WITH SUPERCONDUCTING CIRCUITRY
Embodiments of the present disclosure include techniques for interfacing with superconducting circuits and systems. In one embodiment, the present disclosure includes interface circuitry, including driver circuits and/or receiver circuits to send/receive signals with a superconducting circuit. In another embodiment, the present disclosure includes superconducting circuits and techniques for generating a trigger signal from and external clock that is based on a superconducting resonator. In yet another embodiment, the present disclosure includes superconducting data capture circuits that may be used to couple external data to and/or from superconducting logic.
Superconducting photon detector
The various embodiments described herein include methods, devices, and systems for fabricating and operating superconducting photon detectors. In one aspect, a photon detector includes: (1) a first waveguide configured to guide photons from a photon source; (2) a second waveguide that is distinct and separate from the first waveguide and optically-coupled to the first waveguide; and (3) a superconducting component positioned adjacent to the second waveguide and configured to detect photons within the second waveguide.
Superconductive Memory Cells and Devices
An electronic device (e.g., a superconducting memory cell) includes a substrate and a layer of superconducting material disposed over the substrate. The layer of superconducting material is patterned to form a plurality of distinct instances of the layer of superconducting material including: a first wire; and a loop that is (i) distinct and separate from the first wire and (ii) capacitively coupled to the first wire while the loop and the first wire are in a superconducting state. The loop is configured to form a persistent current via the capacitive coupling in response to a write current applied to the first wire while the loop and the first wire are in the superconducting state. The persistent current represents a logic state of the electronic device.
DEVICE AND SYSTEM FOR SINGLE PHOTON DETECTION USING A PLURALITY OF SUPERCONDUCTING DETECTION MEANS CONNECTED IN PARALLEL
A device for single-photon detection comprising two superconducting detectors, a bias-current source, a filter element and a readout circuit. Each detector forms a detection area for absorption of incident photons and is connected in parallel; each detector being maintained below its critical temperature and provided with an electrical bias current situated close to and below its critical current so as to be maintained in a non-resistive superconducting state, and configured to transition, at photon absorption, from the non-resistive state to a resistive state due to an increase in current density within the detector above the critical current. The readout circuit senses a voltage change corresponding to the, allowing creation of an event signal for each absorption of an incident photon by a detector. The device includes a current-redistribution portion for redistributing current arising after absorption of incident photons so as to avoid increases in current density above the critical current.
Photodetector with Superconductor Nanowire Transistor Based on Interlayer Heat Transfer
A transistor includes (i) a first wire including a semiconducting component configured to operate in an on state at temperatures above a semiconducting threshold temperature and (ii) a second wire including a superconducting component configured to operate in a superconducting state while: a temperature of the superconducting component is below a superconducting threshold temperature and a first input current supplied to the superconducting component is below a current threshold. The semiconducting component is located adjacent to the superconducting component. In response to a first input voltage, the semiconducting component is configured to generate an electromagnetic field sufficient to lower the current threshold such that the first input current exceeds the lowered current threshold.
QUANTUM MEASUREMENT EMULATION ERROR MITIGATION PROTOCOL FOR QUANTUM COMPUTING
Systems and methods for performing open-loop quantum error mitigation using quantum measurement emulations are provided. The open-loop quantum error mitigation methods do not require the performance of state readouts or state tomography, reducing hardware requirements and increasing overall computation speed. To perform a quantum measurement emulation, an error mitigation apparatus is configured to stochastically apply a quantum gate to a qubit or set of qubits during a quantum computational process. The stochastic application of the quantum gate projects the quantum state of the affected qubits onto an axis, reducing a trace distance between the quantum state and a desired quantum state.
THREE-DIMENSIONAL IMAGING METHOD BASED ON SUPERCONDUCTING NANOWIRE PHOTON DETECTION ARRAY
A superconducting nanowire photon detection array adjusts a number of the array elements, a lens array as an photon alignment system, splits transmitted lights into a plurality of beams, and converges the plurality of beams to a superconducting nanowire detection area; detects a surface of an object by adopting a pulsed laser, transmits different light pulses reflected by the surface of the object through the lens array, and records a round-trip time of each photon; collects the photons detected by each array element, takes the array elements as picture elements, and calculates a gray value of the picture element; and plots a gray-scale image by taking the picture elements as pixel points, calculates a distance between the object and the pixel points, and reconstructs a three-dimensional image of the object and the distance between the object and the pixel points.
Superconducting nanowire-based programmable processor
Apparatus and methods relating to programmable superconducting cells are described. A programmable superconducting cell can be formed from a superconducting current loop having at least two terminals connected to the loop. The current loop and terminals can be formed from a single layer of superconducting material. The programmable superconducting cell can be incorporated into a crossbar architecture to form a high-speed vector-matrix multiplying processor for deep neural network computations.