A method for manufacturing a light emitting element according to the present disclosure is a method for manufacturing a light emitting element which includes a stacked structure 20 in which a first compound semiconductor layer 21, an active layer 23, and a second compound semiconductor layer 22 are stacked, a first light reflecting layer 41, and a second light reflecting layer 42 having a flat shape, and in which a base surface 90 positioned on a first surface side of the first compound semiconductor layer 21 has a protrusion 91 protruding in a direction away from the active layer 23, and a cross-sectional shape of the protrusion 91 includes a smooth curve, the method including: forming a first sacrificial layer 81 on the base surface on which the protrusion 91 is to be formed; forming a second sacrificial layer 82 on the entire surface; and performing etching back from the base surface 91 inward by using the second sacrificial layer 82 and the first sacrificial layer 81 as etching masks.

To provide a light-emitting apparatus capable of shaping light from a plurality of light-emitting elements into light with a plurality of shapes and a manufacturing method thereof. A light-emitting apparatus according to the present disclosure, including: a substrate; a plurality of light-emitting elements which are provided on a side of a first surface of the substrate; and a plurality of first lenses which are provided on a side of a second surface of the substrate and on which light emitted from the plurality of light-emitting elements is incident, wherein the plurality of first lenses include at least two types of lenses among a concave lens, a convex lens, and a flat lens.

A vertical cavity light-emitting element includes a substrate, a first multilayer reflector, a semiconductor structure layer, an electrode layer, and a second multilayer reflector. The semiconductor structure layer includes a first semiconductor layer of a first conductivity type on the first multilayer reflector, a light-emitting layer on the first semiconductor layer, and a second semiconductor layer of a second conductivity type on the light-emitting layer. The electrode layer is on an upper surface of the semiconductor structure layer and is electrically in contact with the second semiconductor layer in one region of the upper surface. The second multilayer reflector covers the one region on the electrode layer and constitutes a resonator with the first multilayer reflector. The semiconductor structure layer has one recessed structure including one or a plurality of recessed portions passing through the light-emitting from the upper surface in a region surrounding the one region.

Disclosed herein are various embodiments for stronger and more powerful high speed laser arrays. For example, an apparatus is disclosed that comprises an active mesa structure in combination with an electrical waveguide, wherein the active mesa structure comprises a plurality of laser regions within the active mesa structure itself, each laser region of the active mesa structure being electrically isolated within the active mesa structure itself relative to the other laser regions of the active mesa structure.

A light emitting element includes: a laminated structure 20 obtained by laminating a first compound semiconductor layer 21, an active layer 23, and a second compound semiconductor layer 22; a first light reflecting layer 41 disposed on a first surface side of the first compound semiconductor layer 21; a second light reflecting layer 42 disposed on a second surface side of the second compound semiconductor layer 22; and light convergence/divergence changing means 50. The first light reflecting layer 41 is formed on a concave mirror portion 43. The second light reflecting layer 42 has a flat shape. When light generated in the active layer 23 is emitted to the outside, a light convergence/divergence state before the light is incident on the light convergence/divergence changing means 50 is different from a light convergence/divergence state after the light passes through the light convergence/divergence changing means 50.

A method for fabricating a buried heterostructure semiconductor optical amplifier is provided. The method includes a step providing a patterned dielectric layer on a substrate, the patterned dielectric layer having openings to expose uncovered regions of the substrate. The method also includes, in a single metal organic chemical vapour deposition (MOCVD) run: etching the uncovered regions of the substrate to form angles at corresponding edges thereof and diffusing a p-dopant in the substrate to obtain a p-dopant distribution in a portion of the substrate; etching a portion of the p-dopant thereby defining a recess in the substrate and growing a n-blocking layer in the recess; sequentially growing, over a portion of the n-blocking layer, an active region, a p-overclad, a p-contact, and a p-metal contact; and growing a n-metal contact on a backside of the substrate. The single MOCVD run combines selective area growth, p-dopant diffusion and etching techniques.

[Object] To provide a vertical cavity surface emitting laser element having a structure whose pitch can be narrowed, a vertical cavity surface emitting laser element array, a vertical cavity surface emitting laser module, and a method of producing a vertical cavity surface emitting laser element.

[Solving Means] A vertical cavity surface emitting laser element according to the present technology includes: a first substrate; and a second substrate. The first substrate is provided with a semiconductor layer including an active layer and a first distributed Bragg reflector (DBR) layer. The second substrate is provided with a constriction layer and a second DBR layer, the constriction layer having a constriction region and an injection region having conductivity higher than that of the constriction region, the second substrate being bonded to the first substrate such that the constriction layer is adjacent to the semiconductor layer.

A laser device is provided. The laser device includes a bottom plate, a frame body, a heat sink and a light-emitting chip. The light-emitting chip is located on a surface of the heat sink away from the bottom plate. The light-emitting chip includes a plurality of first protrusions and/or a plurality of first depressions, the plurality of first protrusions and/or the plurality of first depressions are located on a first surface of the light-emitting chip; the heat sink includes a plurality of second depressions and/or a plurality of second protrusions, the plurality of second depressions and/or the plurality of second protrusions are located on a second surface of the heat sink; the plurality of first protrusions are located in the plurality of second depressions, and the plurality of second protrusions are located in the plurality of first depressions.

A vertical cavity surface emitting laser (VCSEL) may include a substrate layer, epitaxial layers on the substrate layer, and angled reflectors configured to receive an optical beam emitted toward a bottom surface of the VCSEL and redirect the optical beam through an exit window in a top surface of the VCSEL. In some implementations, the angled reflectors may be formed in the substrate layer. Additionally, or alternatively, the VCSEL may include molded optics, where the molded optics include the angled reflectors. In some implementations, the exit window may include an integrated lens.

A thermally tunable laser includes: a substrate; a laser resonator, wherein the laser resonator includes a gain section, and wherein the laser resonator includes a tuning section; a heating arrangement; a heat sink arrangement for dissipating a heat flow from the laser resonator to the heat sink arrangement; and a hole arrangement for influencing the heat flow from the laser resonator to the heat sink arrangement, wherein the hole arrangement is arranged between the substrate and the heat sink arrangement, wherein one or more holes of the hole arrangement include at least one hole being arranged within a horizontal range of the tuning section, so that a thermal resistance between the tuning section and the heat sink arrangement is increased.