A light emitting device according to an embodiment of the present disclosure includes: a substrate; a first contact layer; a buffer layer in which at least any of a carrier concentration, a material composition, and a composition ratio is different from that of the first contact layer; and a semiconductor stacked body. The substrate has a first surface and a second surface that are opposed to each other. The first contact layer is stacked on the first surface of the substrate. The buffer layer is stacked on the first contact layer. The semiconductor stacked body is stacked above the first surface of the substrate with the first contact layer and the buffer layer interposed in between. The semiconductor stacked body has a light emitting region configured to emit laser light.

Example vertical cavity surface emitting lasers (VCSELs) include a mesa structure disposed on a substrate, the mesa structure including a first reflector, a second reflector defining at least one diameter, and an active cavity material structure disposed between the first and second reflectors; and a second contact layer disposed at least in part on top of the mesa structure and defining a physical emission aperture having a physical emission aperture diameter. The ratio of the physical emission aperture diameter to the at least one diameter is greater than or approximately 0.172 and/or the ratio of the physical emission aperture diameter to the at least one diameter is less than or approximately 0.36. An example VCSEL includes a substrate; a buffer layer disposed on a portion of the substrate; and an emission structure disposed on the buffer layer.

A light emitting device according to an embodiment of the present disclosure includes: a semi-insulating substrate having a first surface and a second surface that are opposed to each other; a first semiconductor layer that is stacked on the first surface of the semi-insulating substrate and has a lattice plane non-continuous to the semi-insulating substrate; and a semiconductor stacked body that is stacked above the first surface of the semi-insulating substrate with the semiconductor layer interposed in between. The first semiconductor layer has a first electrical conduction type. The semiconductor stacked body has a light emitting region configured to emit laser light.

A method for tuning the frequency of THz radiation is provided. The method utilizes an apparatus comprising a spin injector, a tunnel junction coupled to the spin injector, and a ferromagnetic material coupled to the tunnel junction. The ferromagnetic material comprises a Magnon Gain Medium (MGM). The method comprises the step of applying a bias voltage to shift a Fermi level of the spin injector with respect to the Fermi level of the ferromagnetic material to initiate generation of non-equilibrium magnons by injecting minority electrons into the Magnon Gain Medium. The method further comprises the step of tuning a frequency of the generated THz radiation by changing the value of the bias voltage.

A photonic integrated circuit including first and second opto-electronic devices that are fabricated on a semiconductor wafer having an epitaxial layer stack including an n-type indium phosphide-based contact layer that is provided with at least one selectively p-type doped tubular-shaped region for providing an electrical barrier between respective n-type contact regions of the first and second opto-electronic devices that are optically interconnected by a passive optical waveguide that is fabricated in a non-intentionally doped waveguide layer including indium gallium arsenide phosphide, the non-intentionally doped waveguide layer being arranged on top of the n-type contact layer, wherein a first portion of the at least one selectively p-type doped tubular-shaped region is arranged underneath the passive optical waveguide between the first and second opto-electronic devices. An opto-electronic system including the photonic integrated circuit.

An emitter may include a substrate, a conductive layer on at least a bottom surface of a trench, and a first metal layer to provide a first electrical contact of the emitter on an epitaxial side of the substrate. The first metal layer may be within the trench such that the first metal layer contacts the conductive layer within the trench. The emitter may further include a second metal layer to provide a second electrical contact of the emitter on the epitaxial side of the substrate, and an isolation implant to block lateral current flow between the first electrical contact and the second electrical contact.

In some implementations, a vertical cavity surface emitting laser (VCSEL) array may include a substrate. In some implementations, the VCSEL array may include a set of cathodes disposed on the substrate in a first direction, wherein a cathode, of the set of cathodes, is defined by a serpentine shape. In some implementations, the VCSEL array may include a set of anodes disposed on the substrate in a second direction, wherein an anode, of the set of anodes, is defined by the serpentine shape.

Methods, devices and systems are described for enabling a series-connected, single chip vertical-cavity surface-emitting laser (VCSEL) array. In one aspect, the single chip includes one or more non-conductive regions one the conductive layer to produce a plurality of electrically separate conductive regions. Each electrically separate region may have a plurality of VCSEL elements, including an anode region and a cathode region connected in series. The chip is connected to a sub-mount with a metallization pattern, which connects each electrically separate region on the conductive layer in series. In one aspect, the metallization pattern connects the anode region of a first electrically separate region to the cathode region of a second electrically separate region. The metallization pattern may also comprise cuts that maintain electrical separation between the anode and cathode regions on each conductive layer region, and that align with the etched regions.

An optoelectronic device includes a substrate and at least three emitters, which are disposed on the substrate and are configured to emit respective beams of light. A plurality of waveguides are disposed on the substrate and have respective input ends coupled to receive the beams of light from respective ones of the emitters, and curve adiabatically from the input ends to respective output ends of the waveguides, which are arranged on the substrate in an array having a predefined pitch. Control circuitry is configured to apply a temporal modulation independently to each of the beams of light.

A VCSEL array comprises series-connected VCSEL sub-arrays formed on a single chip. The VCSEL sub-arrays each comprises VCSEL emitters fabricated on a semi-insulating layer. A common cathode contact of a VCSEL sub-array is electrically connected to a common anode contact of a neighboring VCSEL sub-array. To reduce leakage, the bandgap energy level of the semi-insulating layer is higher than the photon energy of the output beam. In one embodiment, the semi-insulating layer is grown on a conductive layer. A common cathode contact of the last VCSEL sub-array in a series is electrically connected to the conductive layer. In another embodiment, multiple wire-bonding areas are electrically connected to common anode contacts of multiple VCSEL sub-arrays respectively. The wire-bonding areas provide different input impedance options for a VCSEL array.