H01S5/18316

VERTICAL CAVITY SURFACE EMITTING LASER ELEMENT, VERTICAL CAVITY SURFACE EMITTING LASER ELEMENT ARRAY, VERTICAL CAVITY SURFACE EMITTING LASER MODULE, AND METHOD OF PRODUCING VERTICAL CAVITY SURFACE EMITTING LASER ELEMENT
20230006421 · 2023-01-05 ·

[Object] To provide a vertical cavity surface emitting laser element having a structure whose pitch can be narrowed, a vertical cavity surface emitting laser element array, a vertical cavity surface emitting laser module, and a method of producing a vertical cavity surface emitting laser element.

[Solving Means] A vertical cavity surface emitting laser element according to the present technology includes: a first substrate; and a second substrate. The first substrate is provided with a semiconductor layer including an active layer and a first distributed Bragg reflector (DBR) layer. The second substrate is provided with a constriction layer and a second DBR layer, the constriction layer having a constriction region and an injection region having conductivity higher than that of the constriction region, the second substrate being bonded to the first substrate such that the constriction layer is adjacent to the semiconductor layer.

MONOLITHIC MICRO-PILLAR PHOTONIC CAVITIES BASED ON III-NITRIDE SEMICONDUCTORS

A method of making a Group III nitride material that includes: providing a substrate; patterning a template on the substrate; depositing a layer of a material comprising aluminum, gallium and nitrogen on the substrate at a temperature; annealing the layer comprising aluminum, gallium and nitrogen; epitaxially growing Distributed Bragg Reflectors to form a structure on the substrate that comprises microcavities; and etching micropillars in the structure for at least 30 seconds with a heated basic solution is described.

Fabrication of low-cost long wavelength VCSEL with optical confinement control

Several VCSEL devices for long wavelength applications in wavelength range of 1200-1600 nm are described. These devices include an active region between a semiconductor DBR on a GaAs wafer and a dielectric DBR regrown on the active region. The active region includes multi-quantum layers (MQLs) confined between the active n-InP and p-InAlAs layers and a tunnel junction layer above the MQLs. The semiconductor DBR is fused to the bottom of the active region by a wafer bonding process. The design simplifies integrating the reflectors and the active region stack by having only one wafer bonding followed by regrowth of the other layers including the dielectric DBR. An air gap is fabricated either in an n-InP layer of the active region or in an air gap spacer layer on top of the semiconductor DBR. The air gap enhances optical confinement of the VCSEL. The air gap may also contain a grating.

SURFACE-EMITTING LASER ELEMENT AND SURFACE-EMITTING LASER ELEMENT MANUFACTURING METHOD

A surface-emitting laser element includes: a first guide layer including a photonic crystal layer that is formed on a c plane of a group-3 nitride semiconductor and includes air holes arranged with two-dimensional periodicity in a plane parallel to the photonic crystal layer, and an embedding layer that is formed on the photonic crystal layer and closes the air holes; an active layer formed on the first guide layer; and a second guide layer formed on the active layer, wherein an air hole set including at least a main air hole and a sub-air hole smaller in size than the main air hole is arranged at each square lattice point in the plane parallel to the photonic crystal layer, and wherein the main air hole has a regular-hexagonal prism shape, a long-hexagonal prism shape, or an elliptic cylindrical shape with a major axis parallel to a <11-20> axis.

METHOD FOR ELECTROCHEMICALLY ETCHING A SEMICONDUCTOR STRUCTURE
20230105367 · 2023-04-06 ·

A method for etching a semiconductor structure (110) is provided, the semiconductor structure comprising a sub-surface quantum structure (30) of a first III-V semiconductor material, beneath a surface layer (31) of a second III-V semiconductor material having a charge carrier density of less than 5 × 10.sup.17 cm.sup.-3. The sub-surface quantum structure may comprise, for example, a quantum well, or a quantum wire, or a quantum dot. The method comprises the steps of exposing the surface layer to an electrolyte (130), and applying a potential difference between the first III-V semiconductor material and the electrolyte, to electrochemically etch the sub-surface quantum structure (30) to form a plurality of nanostructures, while the surface layer (31) is not etched. A semiconductor structure, uses thereof, and devices incorporating such semiconductor structures are further provided.

LOW CAPACITANCE OPTOELECTRONIC DEVICE

An optoelectronic semiconductor device is disclosed wherein the device is a vertical-cavity surface-emitting laser or a photodiode containing a section, the top part of which is electrically isolated from the rest of the device. The electric isolation can be realized by etching a set of holes and selective oxidation of AlGaAs layer or layers such that the oxide forms a continuous layer or layers everywhere beneath the top surface of this section. Alternatively, a device can be grown epitaxially on a semi-insulating substrate, and a round trench around a section of the device can be etched down to the semi-insulating substrate thus isolating this section electrically from the rest of the device. Then if top contact pads are deposited on top of the electrically isolated section, the pads have a low capacitance, and a pad capacitance below two hundred femto-Farads, and the total capacitance of the device below three hundred femto-Farads can be reached.

WIDELY TUNABLE SHORT CAVITY LASER

A tunable source includes a short-cavity laser optimized for performance and reliability in SSOCT imaging systems, spectroscopic detection systems, and other types of detection and sensing systems. The short cavity laser has a large free spectral range cavity, fast tuning response and single transverse, longitudinal and polarization mode operation, and includes embodiments for fast and wide tuning, and optimized spectral shaping. Disclosed are both electrical and optical pumping in a MEMS-VCSEL geometry with mirror and gain regions optimized for wide tuning, high output power, and a variety of preferred wavelength ranges; and a semiconductor optical amplifier, combined with the short-cavity laser to produce high-power, spectrally shaped operation. Several preferred imaging and detection systems make use of this tunable source for optimized operation are also disclosed.

FABRICATION OF LOW-COST LONG WAVELENGTH VCSEL WITH OPTICAL CONFINEMENT CONTROL

Several VCSEL devices for long wavelength applications in wavelength range of 1200-1600 nm are described. These devices include an active region between a semiconductor DBR on a GaAs wafer and a dielectric DBR regrown on the active region. The active region includes multi-quantum layers (MQLs) confined between the active n-InP and p-InAlAs layers and a tunnel junction layer above the MQLs. The semiconductor DBR is fused to the bottom of the active region by a wafer bonding process. The design simplifies integrating the reflectors and the active region stack by having only one wafer bonding followed by regrowth of the other layers including the dielectric DBR. An air gap is fabricated either in an n-InP layer of the active region or in an air gap spacer layer on top of the semiconductor DBR. The air gap enhances optical confinement of the VCSEL. The air gap may also contain a grating.

VERTICAL-CAVITY SURFACE-EMITTING LASER AND METHOD FOR FORMING THE SAME
20220209502 · 2022-06-30 ·

A vertical-cavity surface-emitting laser includes a substrate. A first mirror is disposed on the substrate. An active layer is disposed on the first mirror. An oxide layer is disposed on the active layer. An aperture is disposed on the active layer. The aperture is surrounded by the oxide layer. A second mirror is disposed on the aperture and the oxide layer. A high-contrast grating is disposed on the second mirror. The high-contrast grating includes a first grating element and a second grating element, and the first grating element and the second grating element are spaced apart from each other with an air gap therebetween. A passivation layer is disposed on the high-contrast grating. A first thickness of the passivation layer on a top surface of the first grating element is greater than a second thickness of the passivation layer on a first sidewall of the first grating element.

Contact architectures for tunnel junction devices

A flip chip III-Nitride LED which utilizes a dielectric coating backed by a metallic reflector (e.g., aluminum or silver). High reflectivity and low resistance contacts for optoelectronic devices. Low ESD rating optoelectronic devices. A VCSEL comprising a tunnel junction for current and optical confinement.