Patent classifications
H01S5/18316
Vertical-cavity surface-emitting laser (VCSEL) device and method of making the same
A VCSEL includes an active region between a top distributed Bragg reflector (DBR) and a bottom DBR each having alternating GaAs and AlGaAs layers. The active region includes quantum wells (QW) confined between top and bottom GaAs-containing current-spreading layers (CSL), an aperture layer having an optical aperture and a tunnel junction layer above the QW. A GaAs intermediate layer configured to have an open top air gap is disposed over a boundary layer of the active region and the top DBR. The air gap is made wider than the optical aperture and has a height equal to one quarter of VCSEL's emission wavelength in air. The top DBR is attached to the intermediate layer by applying wafer bonding techniques. VCSEL output, the air gap, and the optical aperture are aligned on the same optical axis. The bottom DBR is epitaxially grown on a silicon or a GaAs substrate.
Widely tunable short-cavity laser
A tunable source includes a short-cavity laser optimized for performance and reliability in SSOCT imaging systems, spectroscopic detection systems, and other types of detection and sensing systems. The short cavity laser has a large free spectral range cavity, fast tuning response and single transverse, longitudinal and polarization mode operation, and includes embodiments for fast and wide tuning, and optimized spectral shaping. Disclosed are both electrical and optical pumping in a MEMS-VCSEL geometry with mirror and gain regions optimized for wide tuning, high output power, and a variety of preferred wavelength ranges; and a semiconductor optical amplifier, combined with the short-cavity laser to produce high-power, spectrally shaped operation. Several preferred imaging and detection systems make use of this tunable source for optimized operation are also disclosed.
Method for electrochemically etching a semiconductor structure
A method for etching a semiconductor structure (110) is provided, the semiconductor structure comprising a sub-surface quantum structure (30) of a first III-V semiconductor material,beneath a surface layer (31) of a second III-V semiconductor material having a charge carrier density of less than 5×10.sup.17 cm.sup.−3. The sub-surface quantum structure may comprise, for example, a quantum well, or a quantum wire, or a quantum dot. The method comprises the steps of exposing the surface layer to an electrolyte (130), and applying a potential difference between the first III-V semiconductor material and the electrolyte, to electrochemically etch the sub-surface quantum structure (30) to form a plurality of nanostructures, while the surface layer (31) is not etched. A semiconductor structure, uses thereof, and devices incorporating such semiconductor structures are further provided.
VCSELs with improved optical and electrical confinement
An optoelectronic device includes a semiconductor substrate with a first set of epitaxial layers formed on an area of the substrate defining a lower distributed Bragg-reflector (DBR) stack. A second set of epitaxial layers formed over the first set defines a quantum well structure, and a third set of epitaxial layers, formed over the second set, defines an upper DBR stack. At least the third set of epitaxial layers is contained in a mesa having sides that are perpendicular to the epitaxial layers. A dielectric coating extends over the sides of at least a part of the mesa that contains the third set of epitaxial layers. Electrodes are coupled to the epitaxial layers so as to apply an excitation current to the quantum well structure.
VERTICAL-CAVITY SURFACE-EMITTING LASER (VCSEL) DEVICE AND METHOD OF MAKING THE SAME
A VCSEL includes an active region between a top distributed Bragg reflector (DBR) and a bottom DBR each having alternating GaAs and AlGaAs layers. The active region includes quantum wells (QW) confined between top and bottom GaAs-containing current-spreading layers (CSL), an aperture layer having an optical aperture and a tunnel junction layer above the QW. A GaAs intermediate layer configured to have an open top air gap is disposed over a boundary layer of the active region and the top DBR. The air gap is made wider than the optical aperture and has a height equal to one quarter of VCSEL's emission wavelength in air. The top DBR is attached to the intermediate layer by applying wafer bonding techniques. VCSEL output, the air gap, and the optical aperture are aligned on the same optical axis. The bottom DBR is epitaxially grown on a silicon or a GaAs substrate.
CONTACT ARCHITECTURES FOR TUNNEL JUNCTION DEVICES
A flip chip III-Nitride LED which utilizes a dielectric coating backed by a metallic reflector (e.g., aluminum or silver). High reflectivity and low resistance contacts for optoelectronic devices. Low ESD rating optoelectronic devices. A VCSEL comprising a tunnel junction for current and optical confinement.
OXIDE SPACER HCG VCSELS AND FABRICATION METHODS
A high-contrast grating (HCG) structure and method of fabrication. The grating of the HCG is formed over a structural spacer layer, allowing a wider range of grating patterns, such as post and other forms which are lack structural support when fabricated over an air spacing beneath the grating elements. The technique involves etching the HCG grating, followed by oxidizing through this HCG grating into an oxide spacer layer beneath it creating a low-index area beneath the grating. This form of HCG reflector can be utilizes as upper and/or lower reflectors in fabricating vertical cavity surface emitting lasers (VCSELs).
METHOD FOR ELECTROCHEMICALLY ETCHING A SEMICONDUCTOR STRUCTURE
A method for etching a semiconductor structure (110) is provided, the semiconductor structure comprising a sub-surface quantum structure (30) of a first III-V semiconductor material,beneath a surface layer (31) of a second III-V semiconductor material having a charge carrier density of less than 510.sup.17 cm.sup.3. The sub-surface quantum structure may comprise, for example, a quantum well, or a quantum wire, or a quantum dot. The method comprises the steps of exposing the surface layer to an electrolyte (130), and applying a potential difference between the first III-V semiconductor material and the electrolyte, to electrochemically etch the sub-surface quantum structure (30) to form a plurality of nanostructures, while the surface layer (31) is not etched. A semiconductor structure, uses thereof, and devices incorporating such semiconductor structures are further provided.
WIDELY TUNABLE SHORT-CAVITY LASER
A tunable source includes a short-cavity laser optimized for performance and reliability in SSOCT imaging systems, spectroscopic detection systems, and other types of detection and sensing systems. The short cavity laser has a large free spectral range cavity, fast tuning response and single transverse, longitudinal and polarization mode operation, and includes embodiments for fast and wide tuning, and optimized spectral shaping. Disclosed are both electrical and optical pumping in a MEMS-VCSEL geometry with mirror and gain regions optimized for wide tuning, high output power, and a variety of preferred wavelength ranges; and a semiconductor optical amplifier, combined with the short-cavity laser to produce high-power, spectrally shaped operation. Several preferred imaging and detection systems make use of this tunable source for optimized operation are also disclosed.
Micropillar optoelectronic device
The invention discloses a semiconductor optoelectronic micro-device comprising at least one cavity and at least one multilayer interference reflector. The device represents a micrometer-scale pillar with an arbitrary shape of the cross section. The device includes a vertical optical cavity, a gain medium and means of injection of nonequilibrium carriers into the gain medium, most preferably, via current injection in a p-n-junction geometry. To allow high electric-to-optic power conversion at least one contact is placed on the sidewalls of the micropillar overlapping with at least one doped section of the device. Means for the current path towards the contacts and for the heat dissipation from the gain medium are provided. Arrays of micro-devices can be fabricated on single wafer or mounted on single carrier. Devices with different cross-section of the micropillar emit light at different wavelengths.