Patent classifications
H02H9/005
DRIVING CIRCUIT, ARRAY SUBSTRATE AND DISPLAY APPARATUS
A driving circuit includes at least one first module, an electrostatic charge/discharge module connected to the first module and a grounding module; each first module includes a driving module, a signal transmission module and a gating module; the signal transmission module is connected to and transmits a driving signal to the driving module; the grounding module is grounded; the gating module is connected with the signal transmission module; the gating module is turned on with its turn-on voltage less than or equal to a voltage of the signal transmission module, or turned off with the turn-on voltage greater than the voltage of the signal transmission module; the turn-on voltage of the gating module is greater than that of the driving module; the charge/discharge module is connected to the gating module and the grounding module, and configured to store charges flowing therethrough and release the charges to the grounding module.
METHOD AND SYSTEMS FOR PROTECTION OF MULTIPORT MULTIMODE POWER OVER ETHERNET DEVICES FROM ELECTROMAGNETIC ENERGY DISTURBANCE
A method and system for suppressing EMP-induced voltage surges due to detonation of a nuclear weapon at high altitude generating an EMP (HEMP) comprising E1, E2, and E3 component pulses. Surge protection assemblies are positioned intermediate a signal stream and a plurality of electronic device ports associated with a plurality of communication channels of networked devices. Single-channel multimode surge suppressing systems are combined to form multi-port multimode protection systems that connect directly to multiport networked devices supporting communication channels with mixed signals data and direct current power in Gigabit Ethernet networks supporting PoE. The surge suppressing systems mitigate differential and common mode induced interference and protect from overvoltage surges associated with E1, E2, and E3 components of the HEMP and mitigate the over-voltages to predetermined allowable levels within the predetermined time. The surge suppressing systems is interoperable with multimode PoE and support endpoint and midspan PoE devices of Gigabit networks.
METHOD AND APPARATUS FOR DV/DT CONTROLLED RAMP-ON IN MULTI-SEMICONDUCTOR SOLID-STATE POWER CONTROLLERS
Multi-semiconductor SSPCs that solve bus level problems affecting systems as well as controller level problems affecting individual multi-semiconductor SSPCs are disclosed. Bus level and controller level problems adversely affect multi-semiconductor SSPCs and their associated systems. The disclosed multi-semiconductor SSPCs solve both bus level and controller level problems by implementing controlled rate-change of voltage (dv/dt) ramp-on rate, to ensure that the voltage on the input bus does not collapse when a multi-semiconductor SSPC is commanded closed and that a minimum amount of power is being dissipated evenly across the switching semiconductors.
Charge storage with electrical overstress protection
Aspects of this disclosure relate to detecting and recording information associated with electrical overstress (EOS) events, such as electrostatic discharge (ESD) events. For example, in one embodiment, an apparatus includes an electrical overstress protection device, a detection circuit configured to detect an occurrence of the EOS event, and a memory configured to store information indicative of the EOS event.
Driving circuit, array substrate and display apparatus
A driving circuit includes at least one first module, an electrostatic charge/discharge module connected to the first module and a grounding module; each first module includes a driving module, a signal transmission module and a gating module; the signal transmission module is connected to and transmits a driving signal to the driving module; the grounding module is grounded; the gating module is connected with the signal transmission module; the gating module is turned on with its turn-on voltage less than or equal to a voltage of the signal transmission module, or turned off with the turn-on voltage greater than the voltage of the signal transmission module; the turn-on voltage of the gating module is greater than that of the driving module; the charge/discharge module is connected to the gating module and the grounding module, and configured to store charges flowing therethrough and release the charges to the grounding module.
TRANSMISSION CIRCUIT FOR ETHERNET DEVICE
A transmission circuit including four transmission component sets for an Ethernet device is provided. Each transmission component set are coupled between an Ethernet connector and an Ethernet chip. Each transmission component set includes a transformer, two capacitors, and four transmission lines (TLs). The transformer includes four terminals and two center taps. Two diagonal terminals of the four terminals are coupled to a ground. The other two diagonal terminals of the four terminals are coupled to the Ethernet connector and, through one of the two capacitors, to the Ethernet chip via two of the four TLs, respectively. The two center taps are coupled to the Ethernet connector and, through the other one of the two capacitors, to the Ethernet chip via the other two of the four TLs, respectively.
Method and systems for protection of multiport multimode power over ethernet devices from electromagnetic energy disturbance
A method and system for suppressing EMP-induced voltage surges due to detonation of a nuclear weapon at high altitude generating an EMP (HEMP) comprising E1, E2, and E3 component pulses. Surge protection assemblies are positioned intermediate a signal stream and a plurality of electronic device ports associated with a plurality of communication channels of networked devices. Single-channel multimode surge suppressing systems are combined to form multi-port multimode protection systems that connect directly to multiport networked devices supporting communication channels with mixed signals data and direct current power in Gigabit Ethernet networks supporting PoE. The surge suppressing systems mitigate differential and common mode induced interference and protect from overvoltage surges associated with E1, E2, and E3 components of the HEMP and mitigate the over-voltages to predetermined allowable levels within the predetermined time. The surge suppressing systems is interoperable with multimode PoE and support endpoint and midspan PoE devices of Gigabit networks.
Transient noise reduction filtering system
A transient noise reduction filter comprises a cable including one or more twisted pairs of conductors and one or more common mode chokes (CMCs). The one or more CMCs a formed from respective pluralities of turns of the cable. Each of the CMCs may be a magnetic CMC wherein the plurality of turns of the cable are wrapped around a magnetic core, or an air-core CMC wherein the plurality of turns of the cable are not wrapped around a magnetic core but are instead disposed around a non-magnetic material (such as air)
Container based by-pass module for electric power lines
A by-pass module for power lines includes a container having a housing space, three reels rotatable around rotation axes and housed into the housing space, single phase link for each reel having a first end termination and a second end termination, each single phase link being wound on a respective reel for being unwound from the first end termination, a driving unit for each reel designed for rotating the reel in an unwinding direction allowing the relevant single phase link to be unwound from the reel, and in a winding direction allowing the relevant single phase link to be wound on the reel.
Power quality device having communication interface
Systems and methods provide power quality devices that have a dual use connector that will couple to a device being protected, such as a telephone handset, and will also provide a communication interface that a technician can access to establish communications with the power quality device.