H02M1/0012

MAGNETIC SENSOR ARRAY PROCESSING FOR INTERFERENCE REDUCTION

Current sensing techniques. In an example, a current sensing method includes: generating a first magnetic field measurement; generating a second magnetic field measurement; generating a frequency estimate of a current; calculating a root-mean-square (RMS) value of an estimated amplitude of the current; and generating a temperature estimate of an integrated circuit (IC) configured to perform the method. The method also includes generating a first weighting factor and a second weighting factor based on the frequency estimate, the RMS value, and the temperature estimate, the first weighting factor to control amplification of the first magnetic field measurement and the second weighting factor to control amplification of the second magnetic field measurement.

LOW EMI DRIVER APPARATUS
20230043119 · 2023-02-09 ·

A low EMI driver apparatus includes: a driver circuit configured to generate a driving signal according to a switch control signal, so as to drive at least one switch; and a driving strength control circuit configured to randomly control a driving strength of the driver circuit, thereby reducing an EMI generated when the at least one switch is driven according to the driving signal. In a specific form of the low EMI driver apparatus, the at least one switch includes plural switches, and the low EMI driver apparatus further includes: a dead time control circuit configured to randomly control a dead time between ON times of the plural switches, so as to reduce the EMI generated when the switches are driven according to the driving signal.

AC/DC CONVERTER STAGE FOR CONVERTER SYSTEM WITH INPUT SERIES STRUCTURE WITH IMPROVED COMMON MODE PERFORMANCE

An AC/DC converter stage for a converter system with an input series structure. The AC/DC converter stage includes two input terminals for inputting an AC input voltage and at least a first circuit branch with at least two switches that are electrically connected in series at a first connection point, where a first input terminal of the two input terminals is electrically connected to the first connection point of the first circuit branch. At least one first electrical storage provides a DC output voltage and is electrically connected in parallel to the first circuit branch. At least one controllable bidirectional switch is electrically connected between the two input terminals.

Devices with Multiple Electrical Converters for Synchronized Electrical Charge Extraction
20230011704 · 2023-01-12 · ·

A method includes converting an electrical output provided by an energy generator with a first voltage converter; and, subsequent to converting the electrical output provided by the energy generator with the first voltage converter, activating, with a microprocessor, a second voltage converter for converting the electrical output provided by the energy generator with the second voltage converter. An electrical device with a microprocessor for selecting one of two or more voltage converters is also described.

Power converter counter circuit with under-regulation detector

Circuits and methods for reducing lagging responses of a power converter to changes in circuit voltages or current, over-shoot/under-shoot when a target output voltage changes faster than the power converter's response, and open loop conditions. Embodiments include scanning a feedback voltage from a load powered by a voltage output by a power converter controlled by a PWM control signal; detecting an under-regulation condition; and, while the under-regulation condition is detected, increasing a clock signal rate to a counter outputting a count value usable to generate the PWM control signal. Embodiments include comparing a target output voltage to a signal representative of an output voltage of the power converter; indicating an under-shoot or over-shoot condition if the voltage difference exceeds a corresponding offset value; and limiting the range of values for an M-bit count value used to generate the PWM control signal to mitigate the under-shoot or over-shoot condition.

DETERMINATION OF ENTERING AND EXITING SAFE MODE
20180013340 · 2018-01-11 ·

The disclosure describes examples of integrate circuit (IC) chips. An IC chip includes a first detector configured to generate information indicative of whether an input supply voltage or power is greater than or equal to a first threshold, a second detector configured to receive a circuit voltage or current level and generate information used to indicate a status of the IC chip based on the received circuit voltage or current level, and a controller configured to cause the IC chip to enter a safe mode in response to both the first detector indicating that the input supply voltage or power is greater than the first threshold and the circuit voltage or current level being greater than a second threshold.

Loss optimization control method for modular multilevel converters under fault-tolerant control
11711008 · 2023-07-25 · ·

A loss optimization control method for modular multilevel converters (MMCs) under fault-tolerant control is disclosed. The method includes the following steps: when a fault of a SM in a MMC occurs, bypassing the faulty SM to achieve fault-tolerant control; suppressing the fundamental circulating current using a fundamental circulating current controller; respectively calculating the loss of each SM in faulty arms and healthy arms by using loss expressions of different switching tubes in SMs of the MMC; aiming at the loss imbalance between the arms of the MMC, taking the loss of a healthy SM as the reference, adjusting the period of capacitor voltage sorting control in the faulty SMs, achieving the loss control over the working SMs in the faulty SMs, and finally achieving the loss balance of each SM in the faulty arms and the healthy arms. Compared with the conventional methods, the proposed method is easier to implement and does not increase the construction cost of MMCs.

Power supply device and pulse frequency modulation method

A power supply device includes a pulse frequency modulation controller circuitry and a cycle controller circuitry. The pulse frequency modulation controller circuitry is configured to adjust a transiting speed of a first signal according to at least one control bit, and to compare the first signal with a first reference voltage to generate a second signal, and to generate a driving signal to a power converter circuit according to an output voltage, a second reference voltage, and the second signal, in which the power converter circuit is configured to generate the output voltage according to the driving signal. The cycle controller circuitry is configured to detect a frequency of the driving signal according to a clock signal having a predetermined frequency, in which the predetermined frequency is set based on a frequency range capable of being heard by humans.

SCC-based DC-DC power conversion system capable of receiving switching control adjustable by output voltage thereof, and power conversion method thereof

A DC-DC power conversion system includes a resonant switched-capacitor converter and a controller. The resonant switched-capacitor converter is switched between a first state and a second state to generate an output voltage, and includes an input terminal, a resonant tank, an output capacitor, a first set of switches and a second set of switches. The input terminal is used to receive an input voltage. The output capacitor is used to generate the output voltage. The first set of switches is turned on in the first state and turned off in the second state according to a first control signal. The second set of switches is turned on in the second state and turned off in the first state according to a second control signal. The controller adjusts the first control signal and the second control signal according to the output voltage.

Control system with delayed protection for a three-level inverter

A microcontroller unit for controlling a three-level inverter including delayed fault protection is provided. The microcontroller unit includes an input port configured to receive a trip signal from a fault detection module, and a plurality of EPWM modules, each configured to control a power switch within the three-level inverter. The microcontroller unit includes an auxiliary EPWM module configured to receive the trip signal and produce a delayed trip signal, and processing circuitry coupled with the input port, the plurality of EPWM modules, and the auxiliary EPWM module. The processing circuitry is configured to, in response to activation of the trip signal, direct one of the plurality of EPWM modules to shut off its corresponding power switch upon activation of the trip signal, and to direct a different one of the plurality of EPWM modules to shut off its corresponding power switch upon activation of the delayed trip signal.