Patent classifications
H02M1/0051
SEMICONDUCTOR DEVICE
A semiconductor device includes a MOSFET including a drift layer, a channel layer, a trench gate structure, a source layer, a drain layer, a source electrode, and a drain electrode. The trench gate structure includes a trench penetrating the channel layer and protruding into the drift layer, a gate insulating film disposed on a wall surface of the trench, and a gate electrode disposed on the gate insulating film. A portion of the trench protruding into the drift layer is entirely covered with a well layer, and the well layer is connected to the channel layer.
Loss optimization control method for modular multilevel converters under fault-tolerant control
A loss optimization control method for modular multilevel converters (MMCs) under fault-tolerant control is disclosed. The method includes the following steps: when a fault of a SM in a MMC occurs, bypassing the faulty SM to achieve fault-tolerant control; suppressing the fundamental circulating current using a fundamental circulating current controller; respectively calculating the loss of each SM in faulty arms and healthy arms by using loss expressions of different switching tubes in SMs of the MMC; aiming at the loss imbalance between the arms of the MMC, taking the loss of a healthy SM as the reference, adjusting the period of capacitor voltage sorting control in the faulty SMs, achieving the loss control over the working SMs in the faulty SMs, and finally achieving the loss balance of each SM in the faulty arms and the healthy arms. Compared with the conventional methods, the proposed method is easier to implement and does not increase the construction cost of MMCs.
Deadtime automatic-optimization system for flyback power supply having primary-side feedback in CCM, control system and method for flyback power supply having primary-side feedback in CCM
An automatic dead zone time optimization system in a primary-side regulation flyback power supply continuous conduction mode (CCM), including a closed loop formed by a control system, including a single output digital to analog converter (DAC) midpoint sampling module, a digital control module, a current detection module, a dead zone time calculation module and a pulse-width modulation (PWM) driving module, and a controlled synchronous rectification primary-side regulation flyback converter. A primary-side current is sampled using a DAC Sampling mechanism to calculate a secondary-side average current, so as to obtain a primary-side average current and a secondary-side average current, in the case of CCM. A secondary-side current is input into the dead zone time calculation module to obtain a reasonable dead zone time; and the PWM driving module is jointly controlled by a primary-side regulation loop and the obtained dead zone time.
Hybrid boost converters
A method comprises configuring a power converter to operate as a boost converter, the power converter comprising a low side switch and a high side switch, during a first dead time after turning off the low side switch and before turning on the high side switch, configuring the power converter such that a current of the power converter flows through a high speed diode, and after turning on the high side switch, configuring the power converter such that the current of the power converter flows through a low forward voltage drop diode.
Dead-time conduction loss reduction for buck power converters
Various embodiments of the present application are directed towards an integrated circuit (IC) including a first switching device, a second switching device, an inductor, and a controller. The inductor is electrically coupled to a first source/drain region of the first switching device and a first source/drain region of the second switching device at a node. The controller is configured to alternatingly change the first and second switching devices between a first state and a second state, respectively. The first switching device is in a third state before or after the second switching device transitions between the first and second states. A subthreshold voltage is applied to a first gate of the first switching device during the third state, such that the third state is between a cutoff mode and a triode mode of the first switching device.
POWER SUPPLY APPARATUS AND IMAGE FORMING APPARATUS
A power supply apparatus includes a transformer including a primary coil, a secondary coil, and an auxiliary coil; a switching element connected in series to the primary coil; a first rectifying/smoothing circuit including a first diode and a first capacitor and configured to rectify and smooth a voltage induced in the auxiliary coil; a second rectifying/smoothing circuit including a second diode and a second capacitor, connected in parallel with the first rectifying/smoothing circuit, and configured to rectify and smooth the voltage induced in the auxiliary coil; and a controller configured to control the switching element. The controller is configured to detect the voltage induced in the auxiliary coil based on an output voltage of the first rectifying/smoothing circuit. A responsiveness of the second diode is better than a responsiveness of the first diode.
METHODS AND APPARATUS TO REDUCE REVERSE RECOVERY DURING THE OPERATION OF AN INVERTING BUCK BOOST CONVERTER
An example apparatus includes: a first and second capacitor; a first and second inductor; a first switch having a first and second terminal, the first terminal coupled to the first capacitor, and the second terminal coupled to the first and second inductor; a second switch having a third and fourth terminal, the third terminal coupled to the second terminal, the fourth terminal coupled to the second capacitor; a third switch having a fifth and sixth terminal, the fifth terminal coupled to the first terminal, the sixth terminal coupled to the second inductor; and a diode having a seventh and eighth terminal, the seventh terminal coupled to the sixth terminal, the eighth terminal coupled to the fourth terminal.
Rectifier circuit, power source device, and method for driving rectifier circuit
A transient current in a rectifier circuit is efficiently reduced. In a rectifier circuit, a first rectifier is provided between the first terminal and a second terminal. In the rectifier circuit, when a switch element is turned ON, a primary winding current flows from a power source to a primary winding in a transformer. When the switch element is turned OFF, a second rectifier current flows from a secondary winding in the transformer to a second rectifier. When the second rectifier current flows, a first reverse voltage is applied between the first terminal and the second terminal. The first reverse voltage is a reverse voltage applied instantaneously.
SWITCHED-INDUCTOR POWER CONVERTER, COMMUNICATION SYSTEM, AND METHOD
This application discloses a switched-inductor power converter, a communication system, and a method. The switched-inductor power converter includes a coupling winding and a unidirectional conduction circuit, and the coupling winding and the unidirectional conduction circuit are connected in series to form a closed loop. A leakage inductor is formed after the coupling winding and a power inductor are magnetically coupled. Existence of the leakage inductor and the unidirectional conduction circuit may suppress a reverse recovery stress of a first diode, to further reduce a reverse recovery current of the first diode, and reduce a reverse recovery loss of the first diode.
Drive device
A drive device includes a driver configured to drive a high-side transistor and a low-side transistor; a first current detecting part for detecting one of an upper-side current that flows to the high-side transistor and a lower-side current that flows to the low-side transistor; a first current determining part that detects a sign of switching of a forward direction/reverse direction of the upper-side current or the lower-side current detected by the first current detecting part or the switching per se; and a slew rate adjusting part configured to control the driver such that a slew rate of the high-side transistor or the low-side transistor is adjusted according to a determination result of the first current determining part.