A power conversion device includes first and second current detectors. A coil is connected a first power terminal through the first and second current detectors. A first switch has a source terminal connected to the coil and a second semiconductor switch has a drain terminal connected to the coil. A first diode is connected between a drain terminal of the first semiconductor switch and a second power supply terminal. A second diode is connected between a source terminal of the second semiconductor switch and the second power terminal. A capacitor is connected in parallel with the first and second diodes. A control circuit is configured to turn the first and second semiconductor switches on or off based on current detections of the first and second current detectors.

A power conversion device includes first and second current detectors. A coil is connected a first power terminal through the first and second current detectors. A first switch has a source terminal connected to the coil and a second semiconductor switch has a drain terminal connected to the coil. A first diode is connected between a drain terminal of the first semiconductor switch and a second power supply terminal. A second diode is connected between a source terminal of the second semiconductor switch and the second power terminal. A capacitor is connected in parallel with the first and second diodes. A control circuit is configured to turn the first and second semiconductor switches on or off based on current detections of the first and second current detectors.

A flyback converter implements a Forced Zero Voltage Switching (ZVS) timing control by detecting a positive current excursion of the secondary winding current as the synchronous rectifier turn off trigger. The synchronous rectifier switch is turned on near the end of the switching cycle or the on duration is extended to develop a current ripple on the secondary winding current. The control circuit of the flyback converter detects a positive current excursion on the secondary winding current to turn off the synchronous rectifier and to start the next switching cycle. At this point, the voltage across the primary switch has been discharged and the primary switch can be turned on with zero drain-to-source voltage. In other embodiments, zero voltage switching for the off-transition of the primary switch is realized by coupling a capacitor across the primary switch or by coupling a capacitor across the primary winding, or both.

A flyback converter implements a Forced Zero Voltage Switching (ZVS) timing control by detecting a positive current excursion of the secondary winding current as the synchronous rectifier turn off trigger. The synchronous rectifier switch is turned on near the end of the switching cycle or the on duration is extended to develop a current ripple on the secondary winding current. The control circuit of the flyback converter detects a positive current excursion on the secondary winding current to turn off the synchronous rectifier and to start the next switching cycle. At this point, the voltage across the primary switch has been discharged and the primary switch can be turned on with zero drain-to-source voltage. In other embodiments, zero voltage switching for the off-transition of the primary switch is realized by coupling a capacitor across the primary switch or by coupling a capacitor across the primary winding, or both.

A flyback converter implements a Forced Zero Voltage Switching (ZVS) timing control by detecting a positive current excursion of the secondary winding current as the synchronous rectifier turn off trigger. The synchronous rectifier switch is turned on near the end of the switching cycle or the on duration is extended to develop a current ripple on the secondary winding current. The control circuit of the flyback converter detects a positive current excursion on the secondary winding current to turn off the synchronous rectifier and to start the next switching cycle. At this point, the voltage across the primary switch has been discharged and the primary switch can be turned on with zero drain-to-source voltage. In other embodiments, zero voltage switching for the off-transition of the primary switch is realized by coupling a capacitor across the primary switch or by coupling a capacitor across the primary winding, or both.

A flyback converter implements a Forced Zero Voltage Switching (ZVS) timing control by detecting a positive current excursion of the secondary winding current as the synchronous rectifier turn off trigger. The synchronous rectifier switch is turned on near the end of the switching cycle or the on duration is extended to develop a current ripple on the secondary winding current. The control circuit of the flyback converter detects a positive current excursion on the secondary winding current to turn off the synchronous rectifier and to start the next switching cycle. At this point, the voltage across the primary switch has been discharged and the primary switch can be turned on with zero drain-to-source voltage. In other embodiments, zero voltage switching for the off-transition of the primary switch is realized by coupling a capacitor across the primary switch or by coupling a capacitor across the primary winding, or both.

An LLC (inductor-inductor-capacitor) converter, including: a primary current sensing circuit operable to sense a primary current of the LLC converter; and a protection circuit coupled between the primary current sensing circuit and power switches of the LLC converter, and operable to increase a switching frequency of the LLC converter when an amplitude of the primary current falls below a predefined low current reference value after a predefined blanking time after a phase transition of the LLC converter.

An LLC (inductor-inductor-capacitor) converter, including: a primary current sensing circuit operable to sense a primary current of the LLC converter; and a protection circuit coupled between the primary current sensing circuit and power switches of the LLC converter, and operable to increase a switching frequency of the LLC converter when an amplitude of the primary current falls below a predefined low current reference value after a predefined blanking time after a phase transition of the LLC converter.