A method includes turning on a first group of switches of a switched capacitor converter in a battery charging system to establish a first conductive path, and configuring a system voltage at a system bus to charge a first flying capacitor to a predetermined voltage level through the first conductive path, wherein the predetermined voltage level is less than the system voltage, and turning on a second group of switches of the switched capacitor converter in the battery charging system to establish a second conductive path to charge a battery, wherein a sum of a voltage across the first flying capacitor and the system voltage is applied to the battery.

A dual-phase hybrid DC-DC converter using a switched-capacitor technique is described. The dual-phase hybrid converter can reduce the volt-seconds on the inductors of the converter, which can allow for a reduction in the size of the inductors. In addition, the dual-phase hybrid converter can utilize inductors as current sources to charge and discharge the flying capacitors, which can reduce the size of the mid capacitor and increase solution density. Because charging and discharging are performed by inductors, the dual-phase hybrid converter can eliminate the capacitor-to-capacitor charge transfer. As such, the dual-phase hybrid converter does not need high capacitance to achieve high efficiency operation, which can further increase solution density.

Disclosed is a multi-stage charge pump. A first stage is controlled by a first clock signal. A second stage is controlled by a second clock signal, which has high and low states that are shifted relative to the high and low states of the first clock signal. The high and low states of the second clock signal can be higher than the high and low states, respectively, of the first clock signal for a positive charge pump and vice versa for a negative charge pump. Any additional stage is similarly controlled by an additional clock signal that is shifted with respect to the clock signal controlling the immediately preceding stage. By shifting the high and low states of clock signals controlling downstream stages, the need for series-connected or high voltage capacitors in the downstream stages is eliminated and circuit complexity and area consumption are reduced.

A method includes configuring a switched capacitor converter to operate in a first fixed PWM mode, wherein in the first fixed PWM mode, the switched capacitor converter is configured to charge a battery coupled to an input of the switched capacitor converter, configuring the switched capacitor converter to operate in a second fixed PWM mode, wherein in the second fixed PWM mode, the switched capacitor converter is configured to discharge the battery, and configuring the switched capacitor converter to operate in a skip mode, wherein the switched capacitor converter has automatic transitions among different modes based on comparisons between an output voltage of the switched capacitor converter and a plurality of predetermined voltage thresholds.

A multi-level charge pump (MCP) circuit is provided. The MCP circuit includes a multi-level voltage circuit configured to receive a supply voltage and generate a low-frequency voltage. The multi-level voltage circuit includes a first switch path, a second switch path, and a third switch path each having a respective on-resistance and coupled in parallel between an input node and an output node. In a non-limiting example, the multi-level voltage circuit is configured to activate the first switch path and at least one of the second switch path and the third switch path when the multi-level voltage circuit generates the low-frequency voltage that equals the supply voltage. By activating at least two of the three switch paths to generate the low-frequency voltage, it may be possible to reduce an equivalent resistance of the multi-level voltage circuit, thus helping to improve efficiency and reduce power loss of the MCP circuit.

A power converter includes a switched-capacitor circuit that forms different capacitor networks out of a set of capacitors. It does so in a way that avoids losses that can arise when capacitors are connected together.

A memory device includes a well, a first gate layer, a second gate layer, a doped region, a blocking layer and an alignment layer. The first gate layer is formed on the well. The second gate layer is formed on the well. The doped region is formed within the well and located between the first gate layer and the second gate layer. The blocking layer is formed to cover the first gate layer, the first doped region and a part of the second gate layer and used to block electrons from excessively escaping. The alignment layer is formed on the blocking layer and above the first gate layer, the doped region and the part of the second gate layer. The alignment layer is thinner than the blocking layer, and the alignment layer is thinner than the first gate layer and the second gate layer.

A method includes configuring a switched capacitor converter to operate in a first fixed PWM mode, wherein in the first fixed PWM mode, the switched capacitor converter is configured to charge a battery coupled to an input of the switched capacitor converter, configuring the switched capacitor converter to operate in a second fixed PWM mode, wherein in the second fixed PWM mode, the switched capacitor converter is configured to discharge the battery, and configuring the switched capacitor converter to operate in a skip mode, wherein the switched capacitor converter has automatic transitions among different modes based on comparisons between an output voltage of the switched capacitor converter and a plurality of predetermined voltage thresholds.

Disclosed embodiments may include an integrated circuit (IC) for controlling a switched-capacitor power converter for converting voltage between first and second nodes to voltage between third and fourth nodes for use with a first plurality of switches, a second plurality of switches, a plurality of capacitors, and a plurality of resonance modules. The IC may include a controller that is configured to control the first plurality of switches to be closed and the second plurality of switches to be open to electrically connect the first node to the third node through a first one of the plurality of capacitors in series with a first one of the plurality of resonance modules.

Provided a voltage generating circuits including assist circuits and operating methods thereof. The voltage generating circuit which includes an assist circuit that generates an assist signal indicating an enable mode or a disable mode. When a first power supply voltage is lower than an assist reference voltage, the assist signal indicates the enable mode, and a compensation circuit generates a compensation signal based on the first power supply voltage. An internal voltage converter generates a regulated voltage based on the first power supply voltage, and a charge pump circuit generates a pump voltage based on the regulated voltage. The compensation signal compensates for the regulated voltage.