A quartz crystal unit comprising a quartz crystal resonator having a base portion, and first and second tuning fork arms connected to the base portion, the base portion having a length less than 0.5 mm and greater than a spaced-apart distance between the first and second tuning fork arms, each of the first and second tuning fork arms having a width less than 0.1 mm and a length less than 1.56 mm, and a plurality of different widths including a first width and a second width greater than the first width, at least one groove being formed in at least one of opposite main surfaces of each of the first and second tuning fork arms so that a length of the at least one groove is within a range of 0.3 mm to 0.79 mm, the quartz crystal resonator being housed in a case, and a lid being connected to the case.

A quartz crystal unit comprising a quartz crystal resonator having a base portion, and first and second tuning fork arms connected to the base portion, the base portion having a length less than 0.5 mm and greater than a spaced-apart distance between the first and second tuning fork arms, each of the first and second tuning fork arms having a width less than 0.1 mm and a length less than 1.56 mm, and a plurality of different widths including a first width and a second width greater than the first width, at least one groove being formed in at least one of opposite main surfaces of each of the first and second tuning fork arms so that a length of the at least one groove is within a range of 0.3 mm to 0.79 mm, the quartz crystal resonator being housed in a case, and a lid being connected to the case.

A circuit includes: an oscillator configured to generate an oscillation clock signal; an NMOS transistor having a source connected with a power terminal of the oscillator, and a drain connected with a first power supply line to which a first power supply voltage is supplied; an operational amplifier configured to control a gate voltage of the NMOS transistor based on a voltage of the power terminal of the oscillator; and a charge pump.

The charge pump is configured to use the oscillation clock signal or a clock signal generated from the oscillation clock signal to boost the first power supply voltage and generate a boosted power supply voltage, and to supply the boosted power supply voltage to the power terminal of the operational amplifier.

A circuit includes: an oscillator configured to generate an oscillation clock signal; an NMOS transistor having a source connected with a power terminal of the oscillator, and a drain connected with a first power supply line to which a first power supply voltage is supplied; an operational amplifier configured to control a gate voltage of the NMOS transistor based on a voltage of the power terminal of the oscillator; and a charge pump.

The charge pump is configured to use the oscillation clock signal or a clock signal generated from the oscillation clock signal to boost the first power supply voltage and generate a boosted power supply voltage, and to supply the boosted power supply voltage to the power terminal of the operational amplifier.

Systems and methods are provided for a crystal (xtal) oscillator with high interference immunity. Generated reference signals may be processed to mitigate effects of interference. The processing may comprise filtering, particularly at harmonic positions, to remove or greatly reduce interference signals.

Systems and methods are provided for a crystal (xtal) oscillator with high interference immunity. Generated reference signals may be processed to mitigate effects of interference. The processing may comprise filtering, particularly at harmonic positions, to remove or greatly reduce interference signals.

A technique for reducing jitter in an oscillating signal generated by an oscillator circuit includes reducing feedback of gate leakage current while increasing electrostatic discharge protection and reducing regulated power supply requirements of the oscillator circuit, as compared to conventional oscillator circuits. A circuit includes a first integrated circuit terminal and a thick gate native transistor of a first conductivity type having a first gate terminal having a first gate thickness. The first gate terminal is coupled to the first integrated circuit terminal. The thick gate native transistor has a first threshold voltage. The thick gate native transistor is configured as a source follower. The circuit includes a second transistor of the first conductivity type having a second gate terminal with a second gate thickness less than the first gate thickness. The second gate terminal is coupled to a source terminal of the thick gate native transistor.

A voltage controlled oscillator (VCO) and a method of operating the VCO are disclosed. The VCO includes an inductor device, a capacitor device coupled in parallel with the inductor device through first and second nodes, and a pair of cross-coupled transistors coupled in parallel with the inductor device and the capacitor device through the first and second nodes. At least one of the pair of cross-coupled transistor includes a plurality of sub transistors coupled in parallel. The sub transistors are individually switchable to adjust current drive capability of each of the sub transistors. Each of the sub transistors includes a first gate and a second gate.

The disclosure relates to a mobile device, comprising: a radio receiver configured to receive a radio signal; a power receiving unit (PRU) configured to receive a wireless charging signal from a power transmission unit (PTU) configured to charge the mobile device; a wireless broadcast receiver configured to receive a harmonic of the wireless charging signal during charging of the mobile device; a frequency manager configured to scan for a frequency of the harmonic and to detect a fundamental frequency of the wireless charging signal based on the scanned harmonic; and a mitigation module configured to mitigate a harmonic content of the wireless charging signal in the received radio signal based on the detected fundamental frequency of the wireless charging signal.

The disclosure relates to a mobile device, comprising: a radio receiver configured to receive a radio signal; a power receiving unit (PRU) configured to receive a wireless charging signal from a power transmission unit (PTU) configured to charge the mobile device; a wireless broadcast receiver configured to receive a harmonic of the wireless charging signal during charging of the mobile device; a frequency manager configured to scan for a frequency of the harmonic and to detect a fundamental frequency of the wireless charging signal based on the scanned harmonic; and a mitigation module configured to mitigate a harmonic content of the wireless charging signal in the received radio signal based on the detected fundamental frequency of the wireless charging signal.