A phase-locked loop comprises a voltage controlled oscillator. The voltage controlled oscillator comprises an inductor and a capacitor, connected in parallel, and also connected in parallel therewith, a negative resistance structure. A first terminal of the negative resistance structure is connected to respective first terminals of the inductor and the capacitor. A second terminal of the negative resistance structure is connected to respective second terminals of the inductor and the capacitor. The negative resistance structure exhibits a tunable capacitance, such that a frequency of an output of the voltage controlled oscillator can be tuned by a control input signal, and the control input signal is generated in the phase-locked loop. The negative resistance structure comprises first and second transistors. There is a first conduction path between the first terminal of the first transistor and the control terminal of the second transistor, and a second conduction path between the control terminal of the first transistor and the first terminal of the second transistor. The control terminal of at least one of the first and second transistors is biased by the control input signal, such that a parasitic capacitance of said at least one of the first and second transistors can be tuned by the control input signal, in order to tune the frequency of the output of the voltage controlled oscillator, and hence the frequency of oscillation of the phase-locked loop.

Disclosed are an oven controlled crystal oscillator device and a frequency compensation method thereof. The oven controlled crystal oscillator device includes: an oven, a microcontroller, an oven controlled crystal oscillator disposed in the oven, and a current detection circuit. The current detection circuit is coupled to the oven controlled crystal oscillator, and is configured to obtain an operating current value of the oven controlled crystal oscillator and provide the operating current value to the microcontroller. The microcontroller is configured to determine a frequency compensation amount according to the operating current value based on a frequency compensation rule, and output the frequency compensation amount to the oven controlled crystal oscillator to compensate an output frequency.

A phase-locked loop comprises a voltage controlled oscillator. The voltage controlled oscillator comprises an inductor and a capacitor, connected in parallel, and also connected in parallel therewith, a negative resistance structure. A first terminal of the negative resistance structure is connected to respective first terminals of the inductor and the capacitor. A second terminal of the negative resistance structure is connected to respective second terminals of the inductor and the capacitor. The negative resistance structure exhibits a tunable capacitance, such that a frequency of an output of the voltage controlled oscillator can be tuned by a control input signal, and the control input signal is generated in the phase-locked loop. The negative resistance structure comprises first and second transistors. There is a first conduction path between the first terminal of the first transistor and the control terminal of the second transistor, and a second conduction path between the control terminal of the first transistor and the first terminal of the second transistor. The control terminal of at least one of the first and second transistors is biased by the control input signal, such that a parasitic capacitance of said at least one of the first and second transistors can be tuned by the control input signal, in order to tune the frequency of the output of the voltage controlled oscillator, and hence the frequency of oscillation of the phase-locked loop.

A circuit device includes an oscillation signal generation circuit that generates an oscillation signal having an oscillation frequency, the oscillation frequency being a frequency set by using frequency control data, and a processor that is configured to perform a signal process on input frequency control data, and. The processor is configured to acquire the frequency control data from which an environmental change component is removed of the environmental change component and an aging change component by using environmental change component information, and perform aging correction on the basis of the frequency control data from which the environmental change component is removed.

A circuit device includes an oscillation signal generation circuit that generates an oscillation signal having an oscillation frequency, the oscillation frequency being a frequency set by using frequency control data, and a processor that is configured to perform a signal process on input frequency control data, and. The processor is configured to acquire the frequency control data from which an environmental change component is removed of the environmental change component and an aging change component by using environmental change component information, and perform aging correction on the basis of the frequency control data from which the environmental change component is removed.

A phase-locked loop comprises a voltage controlled oscillator. The voltage controlled oscillator comprises an inductor and a capacitor, connected in parallel, and also connected in parallel therewith, a negative resistance structure. A first terminal of the negative resistance structure is connected to respective first terminals of the inductor and the capacitor. A second terminal of the negative resistance structure is connected to respective second terminals of the inductor and the capacitor. The negative resistance structure exhibits a tunable capacitance, such that a frequency of an output of the voltage controlled oscillator can be tuned by a control input signal, and the control input signal is generated in the phase-locked loop. The negative resistance structure comprises first and second transistors.