The present disclosure relates to an oscillator device (1, 1′, 1″, 1′″) comprising an active circuit device (2, 2′″), a circuit board (3) and a cavity resonator (4, 4′). The active circuit device (2, 2′″) comprises an amplifier unit (5), and the circuit board (3) comprises a first main side (6) and a 5 second main side (7), where the active circuit device (2, 2′″) is mounted to the first main side (6). The cavity resonator (4, 4′) is positioned on the second main side (7). The oscillator device (1) further comprises at least one excitation via connection (8) that runs through the circuit board (3) and electrically connects the active circuit device (2, 2′″) to an excitation structure (9) inside the cavity resonator (4, 4′).

A low loss unidirectional conductive sheet using magnetic field biasing and electron spin precession for coupling RF power to ferrite resonators, comprising the step of placing a plurality of ferrite resonators in a bias magnetic field to excite the electron spins of the materials of said ferrite resonators into precession.

A microwave generator includes a power supply, an output circuit, a feedback oscillator, a pulse controller, a signal combination circuit and a semiconductor amplifier. The power supply converts input voltage and input current into output voltage and output current. The output circuit generates a microwave signal to an output terminal of the microwave generator and a feedback signal according to the microwave signal. The feedback oscillator generates an oscillation signal according to the feedback signal. According to a reference signal, the pulse controller generates a pulse signal. According to the oscillation signal and pulse signal, the signal combination circuit generates a control signal. The semiconductor amplifier generates and adjusts an amplified signal according to the control signal. The output circuit generates the microwave signal according to the amplified signal. The output current is adjusted according to the amplified signal. Consequently, the input current and the input voltage are in phase.

An electronic device may include a harmonic rejection mixer with a delay line, mixer array, and load. The delay line may generate LO phases. Each mixer in the array may have a first input that receives an LO phase and a second input coupled to an input switch and the first input of the next mixer circuit through an inter-mixer switch. The load may include a set of switches. In a transmit mode, the input switches and set of switches may be closed while the inter-mixer switches are open. In a self-calibration mode, the input switches and set of switches may be open while the inter-mixer switches are closed. A controller may sweep through phase codes for the programmable delay line while storing a digital output from the load. The controller may calibrate the phase code based on the digital output.

Networks of superharmonic injection-locked (SHIL) electronic oscillators can be used to emulate Ising machines for solving difficult computational problems. The oscillators can be simulated or implemented in hardware (e.g., with LC oscillators) and are coupled to each other with links whose connection strengths are weighted according to the problem being solved. The oscillators' phases may be measured with respect to reference signal(s) from one or more reference oscillators, each of which emits a reference signal but does not receive input from any other oscillator. Sparsely connected networks of SHIL oscillators and reference oscillators can be used as Viterbi decoders that do not suffer from the information bottleneck between logic computational blocks and memory in digital computing systems. Sparsely connected networks of SHIL oscillators and reference oscillators can also be programmed to act as Boolean logic gates that operate in both forward and backward directions, enabling multipliers that can factor numbers.

An integrated circuit transceiver device includes a plurality of functional circuits, and clock circuitry for distributing synchronous, in-phase, phase-locked clock signals to all transceiver circuits. The clock circuitry includes a frequency-controllable distributed oscillator including at least one coupled pair of transmission line oscillators having a respective oscillator core, and at least one respective transmission line segment. At least one impedance element couples the at least one respective transmission line segment of a first transmission line oscillator to the at least one respective transmission line segment of a second transmission line oscillator. Impedance of the impedance element is different from impedance of each respective transmission line segment to cause reflection at the at least one impedance element. At least one tap corresponding to each respective one of the transmission line oscillators outputs synchronous, in-phase, phase-locked clock signals for the functional circuits at points along the distributed oscillator.

Rotary traveling wave oscillators (RTWOs) with distributed stubs are provided. In certain embodiments, an RTWO includes segments that are implemented using distributed stubs to mitigate flicker noise upconversion arising from transmission line dispersion. For example, a distance between the distributed stubs can be selected to intentionally generate a phase difference between transmission line modes, thereby cancelling out phase shifts due to transmission line dispersion. In particular, each segment is subdivided into multiple transmission line sections with a maintaining amplifier electrically connected to one of the sections and a tuning capacitor array connected to adjacent transmission line sections.

Transformer based voltage controlled oscillator circuitry for phase-locked loop circuitry includes upper band circuitry and lower band circuitry. The upper band circuitry operates in a first frequency range and includes a first capacitor array having a variable capacitance. The lower band circuitry operates in a second frequency range and includes a second capacitor array having a variable capacitance. The first frequency range higher than the second frequency range. In a first operating mode, the first capacitor array has a first capacitance value and the second capacitor array has a second capacitance value. In a second operating mode, the second capacitor array has a third capacitance value different than the second capacitance value.

A semiconductor device according to the present embodiment includes a plurality of switching elements and a plurality of variable capacitance elements. The switching elements are switching elements connected in series between a first control terminal and a second control terminal and plural types of capacitance control signals can be supplied to the first control terminal and the second control terminal. The variable capacitance elements have capacitance control terminals connected to corresponding one ends of the switching elements, respectively.

A semiconductor device according to the present embodiment includes a plurality of switching elements and a plurality of variable capacitance elements. The switching elements are switching elements connected in series between a first control terminal and a second control terminal and plural types of capacitance control signals can be supplied to the first control terminal and the second control terminal. The variable capacitance elements have capacitance control terminals connected to corresponding one ends of the switching elements, respectively.