H03D1/06

Systems and methods for detecting local oscillator leakage and image tone in I/Q mixer based transceivers

According to one embodiment, a transceiver includes: a radio transmitter including a power amplifier; a detector circuit including: a squaring circuit configured to receive an output of the power amplifier of the radio transmitter and configured to produce an output current; and a DC current absorber electrically connected to an output terminal of the squaring circuit.

Apparatus and method for selecting cell in wireless communication system

The present disclosure relates to a pre-5.sup.th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4.sup.th-Generation (4G) communication system such as Long Term Evolution (LTE). An apparatus of a terminal in a wireless communication system is provided. The apparatus includes at least one transceiver and at least one processor operatively coupled to the at least one transceiver. The at least one processor is configured to control the transceiver to communicate through a cell determined based on information regarding a strength of a received signal for a first cell and a path diversity (PD) for the first cell. The PD comprises information regarding paths associated with the first cell.

PEAK TO AVERAGE POWER RATIO REDUCTION IN MULTICHANNEL DIGITAL FRONT-ENDS (DFES)
20170230221 · 2017-08-10 ·

Systems and methods are provided for peak to average power ratio (PAPR) reduction in multichannel digital front-ends (DFEs). A transmitter may be configured to reduce PAPR during multichannel transmission, with the reducing comprising: generating a plurality of frequency-domain symbols, each of which corresponding to a particular one of a plurality of subcarriers; assigning the subcarriers to a plurality of channels, wherein a number of channels is less than a number of subcarriers; and generating a plurality of time-domain signals corresponding to the channels. An adjustment to reduce PAPR may be applied to at least one of the time-domain signals, with the adjustment being based on symbols boundaries. The adjustment may comprise sign inversion. Adjusted and unadjusted waveforms may be generated for two or more of the time-domain signals; and selection may be made between generated adjusted waveforms based on particular criteria. The criteria may comprise lowest peak.

Systems and methods for detecting local oscillator leakage and image tone in I/Q mixer based transceivers

A detector circuit includes: a squaring circuit configured to receive an output of a power amplifier of a radio transmitter and to produce an output current, the output of the power amplifier including: a desired tone; a local oscillator leakage tone; and an image tone, and the output current of the squaring circuit including: a direct current (DC) component including a function of the desired tone and an alternating current (AC) component; and a DC current absorber electrically connected to an output terminal of the squaring circuit, the DC current absorber being configured to filter out the DC component of the output current of the squaring circuit to produce a filtered output of the squaring circuit, the filtered output including the AC component including functions of the local oscillator leakage tone and the image tone.

Waveform construction using interpolation of data points

A method of constructing a waveform from N sampled data captured at N successive points in time, includes, in part, applying the N sampled data, K data at a time, to each of M delayed replicas of a filter that includes K taps so to generate N×M interpolated data. The waveform is then constructed from the N sampled data and the N×M interpolated data.

Electronic envelope detection circuit and corresponding demodulator
11296654 · 2022-04-05 · ·

An electronic envelope detection circuit includes an input signal detecting circuit having at least one MOS transistor configured to receive a radiofrequency input signal and to deliver an internal signal on the basis of the input signal. The biasing point of the at least one transistor is controlled by the input signal and a control signal. A processing circuit that is coupled to the input signal detecting circuit is configured to deliver a low-frequency output signal on the basis of the internal signal and further deliver the control signal on the basis of the output signal. In operation, the value of the control signal decreases when the average power of the input signal increases, and vice versa.

Electronic envelope detection circuit and corresponding demodulator
11296654 · 2022-04-05 · ·

An electronic envelope detection circuit includes an input signal detecting circuit having at least one MOS transistor configured to receive a radiofrequency input signal and to deliver an internal signal on the basis of the input signal. The biasing point of the at least one transistor is controlled by the input signal and a control signal. A processing circuit that is coupled to the input signal detecting circuit is configured to deliver a low-frequency output signal on the basis of the internal signal and further deliver the control signal on the basis of the output signal. In operation, the value of the control signal decreases when the average power of the input signal increases, and vice versa.

ELECTRONIC ENVELOPE DETECTION CIRCUIT AND CORRESPONDING DEMODULATOR
20210167729 · 2021-06-03 · ·

An electronic envelope detection circuit includes an input signal detecting circuit having at least one MOS transistor configured to receive a radiofrequency input signal and to deliver an internal signal on the basis of the input signal. The biasing point of the at least one transistor is controlled by the input signal and a control signal. A processing circuit that is coupled to the input signal detecting circuit is configured to deliver a low-frequency output signal on the basis of the internal signal and further deliver the control signal on the basis of the output signal. In operation, the value of the control signal decreases when the average power of the input signal increases, and vice versa.

ELECTRONIC ENVELOPE DETECTION CIRCUIT AND CORRESPONDING DEMODULATOR
20210167729 · 2021-06-03 · ·

An electronic envelope detection circuit includes an input signal detecting circuit having at least one MOS transistor configured to receive a radiofrequency input signal and to deliver an internal signal on the basis of the input signal. The biasing point of the at least one transistor is controlled by the input signal and a control signal. A processing circuit that is coupled to the input signal detecting circuit is configured to deliver a low-frequency output signal on the basis of the internal signal and further deliver the control signal on the basis of the output signal. In operation, the value of the control signal decreases when the average power of the input signal increases, and vice versa.

Electronic envelope detection circuit and corresponding demodulator
10951168 · 2021-03-16 · ·

An electronic envelope detection circuit includes an input signal detecting circuit having at least one MOS transistor configured to receive a radiofrequency input signal and to deliver an internal signal on the basis of the input signal. The biasing point of the at least one transistor is controlled by the input signal and a control signal. A processing circuit that is coupled to the input signal detecting circuit is configured to deliver a low-frequency output signal on the basis of the internal signal and further deliver the control signal on the basis of the output signal. In operation, the value of the control signal decreases when the average power of the input signal increases, and vice versa.