H03D1/2245

DEMODULATOR OF A WIRELESS COMMUNICATION READER
20170288741 · 2017-10-05 ·

A demodulator including a peak sampler to control an ADC or a digital resampler to sample a carrier signal in an unmodulated state at peaks, and to sample the carrier signal in a modulated state at a phase of the unmodulated state; and an envelope builder to determine an envelope signal based on differentials between maximum and minimum peaks of respective cycles of the sampled carrier signal. Further, a demodulator having an offset estimator to estimate in-phase and quadrature components of a carrier signal in an unmodulated state to determine in-phase and quadrature component offsets; a load modulated signal estimator to estimate in-phase and quadrature components of a load modulated signal by removing the in-phase and quadrature component offsets from in-phase and quadrature component samples of the carrier signal; and an envelope builder to build an envelope signal by combining the in-phase and quadrature components of the load modulated signal.

DYNAMIC IQ MISMATCH CORRECTION IN FMCW RADAR
20170285140 · 2017-10-05 ·

A FMCW radar receiver includes a LO providing a chirped LO signal, an in-phase (I) channel for outputting I-data and a quadrature (Q) channel for outputting Q-data. A dynamic correction parameter generator generates IQ phase correction values (P[n]s) and IQ gain correction values (G[n]s) based on a frequency slope rate of the chirped LO signal for generating during intervals of chirps including a first sequence of P[n]s and G[n]s during a first chirp and a second sequence of P[n]s and G[n]s during a second chirp. An IQ mismatch (IQMM) correction circuit has a first IQMM input coupled to receive the I-data and a second IQMM input receiving the Q-data, and the P[n]s and G[n]s. During the first chirp the IQMM correction circuit provides first Q′-data and first I′-data and during the second chirp the IQMM correction circuit provides at least second Q′-data and second I′-data.

MEASUREMENT METHOD WITH SYNCHRONOUS SUBSAMPLING
20220185247 · 2022-06-16 ·

An electronic circuit (12) connected to a variable-excitation sensor (24) and comprising: a digital envelope detector (20) arranged to acquire signal that is produced by the sensor in response to an excitation signal, the detector comprising: an analog-to-digital converter (22) arranged to sample the measurement signal in such a manner as to produce sample points during successive observation windows of duration T that comprise a number N.sub.S of sample points, the sample points being spaced apart by a sampling period T.sub.S, the sampling period T.sub.S and the duration T being such that:


T.sub.S=N.sub.P.Math.T.sub.0+(N.sub.T/N.sub.S).Math.T.sub.0 and T=N.sub.S.Math.T.sub.S,

where T.sub.0 is one excitation period of the excitation signal, where N.sub.P, N.sub.T, and N.sub.S are non-zero natural integers, and where N.sub.T is not a multiple of N.sub.S.

Methods and apparatus for signal demodulation

A demodulation system for demodulating an input signal is provided. The input signal includes a carrier wave modulated with data symbols selected from a plurality of candidate complex symbol values. The system includes a carrier recovery module, operative to compensate for a carrier frequency of the carrier wave and output a demodulated data signal. The carrier recovery module includes: a first complex-signal conversion module, operative to convert the input signal into a complex-valued input signal; a voltage-controlled oscillator; a mixer, for mixing the complex-valued input signal and a complex-valued output signal of the voltage-controlled oscillator, and generating a mixer output signal; a low-pass filter, coupled to the mixer, operative to filter the carrier frequency from the mixer output signal, and output a signal corresponding to the demodulated data signal; and a folding module, operative to apply a folding algorithm to the output signal of the low-pass filter.

Dynamic IQ mismatch correction in FMCW radar

A FMCW radar receiver includes a LO providing a chirped LO signal, an in-phase (I) channel for outputting I-data and a quadrature (Q) channel for outputting Q-data. A dynamic correction parameter generator generates IQ phase correction values (P[n]s) and IQ gain correction values (G[n]s) based on a frequency slope rate of the chirped LO signal for generating during intervals of chirps including a first sequence of P[n]s and G[n]s during a first chirp and a second sequence of P[n]s and G[n]s during a second chirp. An IQ mismatch (IQMM) correction circuit has a first IQMM input coupled to receive the I-data and a second IQMM input receiving the Q-data, and the P[n]s and G[n]s. During the first chirp the IQMM correction circuit provides first Q′-data and first I′-data and during the second chirp the IQMM correction circuit provides at least second Q′-data and second I′-data.

Electronic envelope detection circuit and corresponding demodulator
11296654 · 2022-04-05 · ·

An electronic envelope detection circuit includes an input signal detecting circuit having at least one MOS transistor configured to receive a radiofrequency input signal and to deliver an internal signal on the basis of the input signal. The biasing point of the at least one transistor is controlled by the input signal and a control signal. A processing circuit that is coupled to the input signal detecting circuit is configured to deliver a low-frequency output signal on the basis of the internal signal and further deliver the control signal on the basis of the output signal. In operation, the value of the control signal decreases when the average power of the input signal increases, and vice versa.

ELECTRONIC ENVELOPE DETECTION CIRCUIT AND CORRESPONDING DEMODULATOR
20210167729 · 2021-06-03 · ·

An electronic envelope detection circuit includes an input signal detecting circuit having at least one MOS transistor configured to receive a radiofrequency input signal and to deliver an internal signal on the basis of the input signal. The biasing point of the at least one transistor is controlled by the input signal and a control signal. A processing circuit that is coupled to the input signal detecting circuit is configured to deliver a low-frequency output signal on the basis of the internal signal and further deliver the control signal on the basis of the output signal. In operation, the value of the control signal decreases when the average power of the input signal increases, and vice versa.

METHODS AND APPARATUS FOR SIGNAL DEMODULATION
20210075656 · 2021-03-11 ·

A demodulation system for demodulating an input signal is provided. The input signal includes a carrier wave modulated with data symbols selected from a plurality of candidate complex symbol values. The system includes a carrier recovery module, operative to compensate for a carrier frequency of the carrier wave and output a demodulated data signal. The carrier recovery module includes: a first complex-signal conversion module, operative to convert the input signal into a complex-valued input signal; a voltage-controlled oscillator; a mixer, for mixing the complex-valued input signal and a complex-valued output signal of the voltage-controlled oscillator, and generating a mixer output signal; a low-pass filter, coupled to the mixer, operative to filter the carrier frequency from the mixer output signal, and output a signal corresponding to the demodulated data signal; and a folding module, operative to apply a folding algorithm to the output signal of the low-pass filter.

Electronic envelope detection circuit and corresponding demodulator
10951168 · 2021-03-16 · ·

An electronic envelope detection circuit includes an input signal detecting circuit having at least one MOS transistor configured to receive a radiofrequency input signal and to deliver an internal signal on the basis of the input signal. The biasing point of the at least one transistor is controlled by the input signal and a control signal. A processing circuit that is coupled to the input signal detecting circuit is configured to deliver a low-frequency output signal on the basis of the internal signal and further deliver the control signal on the basis of the output signal. In operation, the value of the control signal decreases when the average power of the input signal increases, and vice versa.

Carrier recovery analog system for a receiver of a N-PSK signal

A carrier recovery system for a receiver of a phase-modulated signal N-PSK, the system including a first pre-conditioning circuit of the signal received (S(t)), with the pre-conditioned signal (SP(t)) having a component, non-modulated in phase, at the frequency N.sub.c where .sub.c is the carrier used for the modulation N-PSK, and a carrier regeneration circuit to regenerate two sinusoidal signals in quadrature at the frequency .sub.c, with these signals being phase locked with respect to said non-modulated component in phase of the pre-conditioned signal.