Provided is a sine wave multiplication device of simple configuration, broad input signal level range, and minimal fluctuation in characteristics due to temperature. A signal component that corresponds to a product of an input signal Si and the third harmonic wave of a first square wave W1 included in an output signal Su1; and a signal component that corresponds to a product of the input signal Si and the fifth harmonic wave of the first square wave W1 is canceled by: a signal component that corresponds to a product of the input signal Si and the fundamental wave of a second square wave W2 included in an output signal Su2; and a signal component that corresponds to a product of the input signal Si and the fundamental wave of a second square wave W3 included in an output signal Su3.

A system for synthetically sampling an input signal to provide a sampled signal includes a sample clock and a mixer. The sample clock is configured to generate a sampling signal having a sampling frequency. The mixer is configured to receive the sampling signal and the input signal, and to output an intermediate frequency (IF) signal by mixing the sampling signal and the input signal. An offset voltage is introduced into the mixer with the sampling signal to provide a baseband image, the offset voltage being adjusted so that the baseband image of the IF signal has the same magnitude as a first harmonic image of the IF signal.

A method and system for extracting values representative of modulation signal components from a modulated signal, the modulated signal containing a modulation signal, including developing a local clock signal which correlates in time to the modulated signal and includes a number of phase sectors per cycle and converting the modulated signal into a current that is representative of the signal and routing the current to the inverting input of an amplifier and charging one of a plurality of capacitive devices during each phase sector and sequentially connecting the capacitive devices between the output of the amplifier and the inverting input of the amplifier in non-overlapping sequences, the total of sequences being equal to one full cycle of the clock.

An electronic circuit (12) connected to a variable-excitation sensor (24) and comprising: a digital envelope detector (20) arranged to acquire signal that is produced by the sensor in response to an excitation signal, the detector comprising: an analog-to-digital converter (22) arranged to sample the measurement signal in such a manner as to produce sample points during successive observation windows of duration T that comprise a number N.sub.S of sample points, the sample points being spaced apart by a sampling period T.sub.S, the sampling period T.sub.S and the duration T being such that:

T.sub.S=N.sub.P.Math.T.sub.0+(N.sub.T/N.sub.S).Math.T.sub.0 and T=N.sub.S.Math.T.sub.S,

where T.sub.0 is one excitation period of the excitation signal, where N.sub.P, N.sub.T, and N.sub.S are non-zero natural integers, and where N.sub.T is not a multiple of N.sub.S.

This application relates to time-encoding modulators (TEMs). A TEM receives an input signal (S.sub.IN) and outputs a time-encoded output signal (S.sub.OUT). A filter arrangement receives the input signal and also a feedback signal (S.sub.FB) from the TEM output, and generates a filtered signal (S.sub.FIL) based, at least in part, on the feedback signal. A comparator receives the filtered signal and outputs a time-encoded signal (S.sub.PWM) based at least in part on the filtered signal. The time encoding modulator is operable in a first mode with the filter arrangement configured as an active filter and in a second mode with the filter arrangement configured as a passive filter. The filter arrangement may include an op-amp, capacitance and switch network. In the first mode the op-amp is enabled, and coupled with the capacitance to provide the active filter. In the second mode the op-amp is disabled and the capacitance is coupled to a signal path for the feedback signal to provide a passive filter.

A clock generation circuit has an injection-locked oscillator, a frequency doubler circuit, low pass filters and a calibration circuit. The injection-locked oscillator has an input coupled to a half-rate clock signal. The frequency doubler circuit has inputs coupled to outputs of the injection-locked oscillator. Each of the low pass filters has an input coupled to one of a plurality of outputs of the frequency doubler circuit. The calibration circuit includes comparison logic that receives outputs of the low pass filters. The calibration circuit has an output coupled to a control input of a source of a supply current in the injection-locked oscillator. In one example, the source of the supply current is a current digital to analog converter.

A regenerative selective logarithmic detector amplifier (LDA) can have integrated FM demodulation capabilities. It can receive a wired or wireless FM modulated signal and amplify or demodulate it with high sensitivity, high skirt ratio and minimized noise when compared to the prior art. When used in conjunction with other circuits such as a PLL or mixer, it can improve interference rejection and frequency selectivity and be locked on a precise channel in frequency and phase. The LDA produces intermittent oscillations that are self-quenched when reaching a given threshold. It also embeds the circuitry to perform direct FM discrimination. FM demodulation process is completed by a simple analog or digital frequency to voltage converter. This plus the fact that the instantaneous regeneration gain is low-medium permit to detect signals of small amplitudes buried in the noise.

This application relates to time-encoding modulators (TEMs). A TEM receives an input signal (S.sub.IN) and outputs a time-encoded output signal (S.sub.OUT). A filter arrangement receives the input signal and also a feedback signal (S.sub.FB) from the TEM output, and generates a filtered signal (S.sub.FIL) based, at least in part, on the feedback signal. A comparator receives the filtered signal and outputs a time-encoded signal (S.sub.PWM) based at least in part on the filtered signal. The time encoding modulator is operable in a first mode with the filter arrangement configured as an active filter and in a second mode with the filter arrangement configured as a passive filter. The filter arrangement may include an op-amp, capacitance and switch network. In the first mode the op-amp is enabled, and coupled with the capacitance to provide the active filter. In the second mode the op-amp is disabled and the capacitance coupled to a signal path for the feedback signal to provide a passive filter.

This application relates to time-encoding modulators (TEMs). A TEM receives an input signal (S.sub.IN) and outputs a time-encoded output signal (S.sub.OUT). A filter arrangement receives the input signal and also a feedback signal (S.sub.FB) from the TEM output, and generates a filtered signal (S.sub.FIL) based, at least in part, on the feedback signal. A comparator receives the filtered signal and outputs a time-encoded signal (S.sub.PWM) based at least in part on the filtered signal. The time encoding modulator is operable in a first mode with the filter arrangement configured as an active filter and in a second mode with the filter arrangement configured as a passive filter. The filter arrangement may include an op-amp, capacitance and switch network. In the first mode the op-amp is enabled, and coupled with the capacitance to provide the active filter. In the second mode the op-amp is disabled and the capacitance coupled to a signal path for the feedback signal to provide a passive filter.

Wideband polar receivers and method of operation are described. A phase-modulated input signal is received at a polar receiver that includes an injection-locked oscillator. The injection-locked oscillator includes a plurality of injection points. Based on the frequency of the input signal, a particular Nth harmonic is selected, and the input signal is injected at the set of injection points corresponding to the selected Nth harmonic. The injection-locked oscillator generates an oscillator output signal, and the phase of the input signal is determined from the phase of the oscillator output signal. In some embodiments, the oscillator output signal is frequency-multiplied by N, mixed with the input signal, and filtered for use in amplitude detection. The input signal is decoded based on the phase and amplitude information.