Patent classifications
H03D3/008
CURRENT MODE SIGNAL PATH OF AN INTEGRATED RADIO FREQUENCY PULSE GENERATOR
A current mode end-to-end signal path includes, a digital to analog converter (DAC), operating in current mode and an upconverting mixer, operating in current mode and operatively coupled to the DAC, wherein analog inputs and analog outputs of the DAC and the upconverting mixer are represented as currents, and the DAC generates a baseband signal.
DC offset compensation in zero-intermediate frequency mode of a receiver
A method for operating a radio frequency communications system includes, while operating a first radio frequency communications device in a calibration mode, for each setting of a plurality of settings of a programmable gain amplifier in a receiver of the first radio frequency communications device configured in a zero-intermediate frequency mode of operation, generating an estimate of a DC offset in each of a plurality of digital samples received from an analog circuit path including the programmable gain amplifier, and storing in a corresponding storage element, a compensation value based on the estimate.
Method and Apparatus to Detect LO Leakage and Image Rejection using a Single Transistor
Local oscillator (LO) leakage and Image are common and undesirable effects in typical transmitters. Typically, fairly complex hardware and algorithms are used to calibrate and reduce these impairments. A single transistor that draws essentially no dc current and occupies a very small area detects the LO leakage and Image signals. The single transistor operating as a square-law device is used to mix the signals at the input and output ports of a power amplifier. The mixed signal generated by the single transistor enables the simultaneous calibration of the LO leakage and Image Rejection.
DC OFFSET COMPENSATION IN ZERO-INTERMEDIATE FREQUENCY MODE OF A RECEIVER
A method for operating a radio frequency communications system includes, while operating a first radio frequency communications device in a calibration mode, for each setting of a plurality of settings of a programmable gain amplifier in a receiver of the first radio frequency communications device configured in a zero-intermediate frequency mode of operation, generating an estimate of a DC offset in each of a plurality of digital samples received from an analog circuit path including the programmable gain amplifier, and storing in a corresponding storage element, a compensation value based on the estimate.
DC offset correction in an antenna aperture
A method and apparatus for DC offset correction in an antenna aperture are described. In one embodiment, the antenna comprises: an array of antenna elements having liquid crystal (LC); drive circuitry coupled to the array and having a plurality of drivers, each driver of the plurality of drivers coupled to an antenna element of the array and operable to apply a drive voltage to the antenna element; and voltage correction logic coupled to the drive circuitry adjust drive voltages to compensate for an offset between a first magnitude of a first voltage applied to the LC of each antenna element during a first interval of drive polarity and a second magnitude of a second voltage applied to the LC of said each antenna element during a second interval of drive polarity opposite the drive polarity of the first interval.
RF ripple correction in an antenna aperture
A method and apparatus for RF ripple correction in an antenna aperture are described. In one embodiment, the antenna comprises: an array of antenna elements having liquid crystal (LC); drive circuitry coupled to the array and having a plurality of drivers, each driver of the plurality of drivers coupled to an antenna element of the array and operable to apply a drive voltage to the antenna element; and radio-frequency (RF) ripple correction logic coupled to the drive circuitry to adjust drive voltages to compensate for ripple.
Systems and methods for digital correction with selective enabling in low intermediate frequency (IF) receivers
The embodiments described herein provide systems and methods for digital correction in low intermediate frequency (IF) receivers. Specifically, the embodiments described herein use digital correction techniques that can correct for signal distortions in low IF receivers caused by I-Q imbalance, including both I-Q magnitude imbalance and I-Q phase imbalance. In general, the embodiments described herein are implemented to at least partially cancel an image of a blocking signal in the complex digital signal. Such a cancellation can be implemented to at least partially cancel an image of blocking signal where that image occurs at or near the intermediate frequency. In one embodiment, a corrector is implemented in a low RF receiver and is configured to receive a complex digital signal that includes an image of a blocking signal. Such a low RF receiver can further include a corrector controller to selectively enable the corrector.
Mixer module
A mixer module includes a mixer, at least one DC offset circuit, a filter and a controller. The mixer mixes an input signal to generate a first signal. The at least one DC offset circuit generates a second signal based on the first signal. The filter filters out an AC portion of the second signal and generates a third signal according to a DC portion of the second signal. The controller controls the at least one DC offset circuit based on the third signal to reduce a DC portion of the first signal.
Device and method for determining a DC component
A device for determining a DC component in a zero-IF radio receiver comprises an input configured to receive a complex baseband signal; and an analyzer configured to analyze the complex baseband signal to determine a DC component in the complex baseband signal by selecting at least three samples of the complex baseband signal and determining the intersection of at least two perpendicular bisectors of at least two straight lines, each straight line running through a different pair of two of said selected samples, said intersection representing the DC component. Further, a corresponding method, a radar device and a radar method are disclosed.
Method for suppressing local oscillator leakage in microwave chip and apparatus thereof
In embodiments of the present disclosure, weighting on a direct current component coefficient dc.sub.i of an I-channel signal and a direct current component coefficient dc.sub.q of a Q-channel signal is performed based on spatial leakage factors k1 and k2 of a microwave chip and a current attenuation amount of a tunable attenuator, to determine a corrected direct current component coefficient dc.sub.i of the I-channel signal and a corrected direct current component coefficient dc.sub.q of the Q-channel signal, and a direct current component superimposed to the I-channel signal of the microwave chip and a direct current component superimposed to the Q-channel signal of the microwave chip are respectively determined based on the corrected direct current component coefficient dc.sub.i of the I-channel signal and the corrected direct current component coefficient dc.sub.q of the Q-channel signal.