A frequency-voltage conversion circuit includes a constant current source, a first switch connected to an output of the constant current source, a first capacitor connected between the first switch and ground, a second switch connected between a first node that is between the first switch and the first capacitor, and an output node, a third switch connected between the first node and the ground, a fourth switch connected to the output of the constant current source, a second capacitor connected between the fourth switch and the ground, a fifth switch connected between a second node that is between the fourth switch and the second capacitor, and the output node, and a sixth switch connected between the second node and the ground.

A frequency-voltage conversion circuit includes a constant current source, a first switch connected to an output of the constant current source, a first capacitor connected between the first switch and ground, a second switch connected between a first node that is between the first switch and the first capacitor, and an output node, a third switch connected between the first node and the ground, a fourth switch connected to the output of the constant current source, a second capacitor connected between the fourth switch and the ground, a fifth switch connected between a second node that is between the fourth switch and the second capacitor, and the output node, and a sixth switch connected between the second node and the ground.

The present disclosure relates to a method of analyzing a pulse modulated signal, wherein the method comprises: receiving a pulse modulated signal; determining a dynamic threshold level based on a period of the pulse modulated signal and the pulse modulated signal; and demodulating the pulse modulated signal by the dynamic threshold level. Moreover, a signal analysis instrument for analyzing a pulse modulated signal is described.

The present disclosure relates to a method of analyzing a pulse modulated signal, wherein the method comprises: receiving a pulse modulated signal; determining a dynamic threshold level based on a period of the pulse modulated signal and the pulse modulated signal; and demodulating the pulse modulated signal by the dynamic threshold level. Moreover, a signal analysis instrument for analyzing a pulse modulated signal is described.

A frequency modulation receiver includes a frequency modulation demodulation circuit that generates a first signal, and a phase locked loop (PLL) circuit coupled to the frequency modulation demodulation circuit to receive the first signal. The PLL circuit includes: a voltage-controlled oscillator (VCO), generating an oscillation output signal according to a filtered output signal; a phase detector, coupled to the VCO, generating a phase signal according to the oscillation output signal and the first signal; and a proportional-integral-derivative (PID) filter, coupled to the VCO and the phase detector, receiving the phase signal and generating the filtered output signal to the VCO.

A frequency modulation receiver includes a frequency modulation demodulation circuit that generates a first signal, and a phase locked loop (PLL) circuit coupled to the frequency modulation demodulation circuit to receive the first signal. The PLL circuit includes: a voltage-controlled oscillator (VCO), generating an oscillation output signal according to a filtered output signal; a phase detector, coupled to the VCO, generating a phase signal according to the oscillation output signal and the first signal; and a proportional-integral-derivative (PID) filter, coupled to the VCO and the phase detector, receiving the phase signal and generating the filtered output signal to the VCO.

A quadrature demodulator not requiring analog mixers. The demodulation is made using a first integrator and a second integrator which are controlled by square logic signals at twice the frequency of the carrier, the received signal being alternatively integrated by the first integrator and the second integrator over periods of time equal to a quarter period of time of the carrier frequency. The samples of the first and second integrators are sampled and subtracted from each other. The successive samples are combined in a first and a second combining module for providing in-phase and quadrature component samples. This demodulator can further be provided with a synchronization module IQ and a symbol synchronization module.

A quadrature demodulator not requiring analog mixers. The demodulation is made using a first integrator and a second integrator which are controlled by square logic signals at twice the frequency of the carrier, the received signal being alternatively integrated by the first integrator and the second integrator over periods of time equal to a quarter period of time of the carrier frequency. The samples of the first and second integrators are sampled and subtracted from each other. The successive samples are combined in a first and a second combining module for providing in-phase and quadrature component samples. This demodulator can further be provided with a synchronization module IQ and a symbol synchronization module.

A decoding circuit may include a section information generation unit suitable for generating section information corresponding to a section in which an input signal has a first value, a period information generation unit suitable for generating period information corresponding to a period of the input signal, a reference information generation unit suitable for generating reference information by dividing a value of the period information by a given value, and a comparison unit suitable for determining a logic value of the input signal by comparing the section information with the reference information.

A decoding circuit may include a section information generation unit suitable for generating section information corresponding to a section in which an input signal has a first value, a period information generation unit suitable for generating period information corresponding to a period of the input signal, a reference information generation unit suitable for generating reference information by dividing a value of the period information by a given value, and a comparison unit suitable for determining a logic value of the input signal by comparing the section information with the reference information.