A distributed amplifier includes a transmission line configured so as to transmit a signal, a variable capacitor having one end connected to the transmission line and the other end connected to the ground, and configured so that the capacitance is adjustable, and a variable capacitor having one end connected to the transmission line and the other end connected to the ground, and configured so that the capacitance is adjustable. The transmission line is configured in such a manner that the inductance is adjustable.

An electronic device may include wireless circuitry with a baseband processor, a transceiver, and an antenna. The transceiver may include a mixer that outputs signals to a transimpedance amplifier. The mixer has an output impedance that varies depending on the frequency of operation. An adjustable resistance can be coupled to the input of the transimpedance amplifier. A control circuit can tune the adjustable resistance to compensate for changes in the output impedance of the mixer as the transceiver operates across a wide range of frequencies.

An electronic device may include wireless circuitry with a baseband processor, a transceiver, and an antenna. The transceiver may include a mixer that outputs signals to a transimpedance amplifier. The mixer has an output impedance that varies depending on the frequency of operation. An adjustable resistance can be coupled to the input of the transimpedance amplifier. A control circuit can tune the adjustable resistance to compensate for changes in the output impedance of the mixer as the transceiver operates across a wide range of frequencies.

A distributed power amplifier includes radio frequency (RF) input and output terminals. A first field effect transistor (FET) is coupled at a first gate terminal to the RF input terminal and at a first drain terminal to the RF output terminal. The first FET has a first periphery and a first source terminal electrically connected to ground potential. A second FET has a second periphery smaller than the first periphery. The second FET has a second gate terminal electrically coupled to the first gate terminal through a first inductor, a second drain terminal electrically coupled to the first drain terminal through a second inductor, and a second source terminal electrically connected to the ground potential. A drain voltage terminal, which excludes a resistive element, is electrically coupled to a drain bias network through which a drain bias voltage is applied to the first drain terminal and the second drain terminal.

A distribution amplifier for a communication device such as a gateway is provided. The distribution amplifier can receive an input signal and provide multiple output signals. The distribution amplifier can have a transmission line that receives the input signal and multiple amplifier stages that are connected to the transmission line to receive the input signal. The output of the amplifier stages correspond to the output signals from the distribution amplifier. The transmission line has equally spaced connection points for the amplifier stages. The transmission line can be designed to have an impedance that results in the impedance of the transmission line with the connected amplifier stages having a final impedance that matches the input impedance to the transmission line.

A dc coupled amplifier includes a pre-driver, and amplifier and a bias control circuit. The pre-driver is configured to receive one or more input signals and amplify the one or more input signals to create one or more pre-amplified signals. The amplifier has cascode configured transistors configured to receive and amplify the one or more pre-amplified signals to create one or more amplified signals, the amplifier further having an output driver termination element. The bias control circuit is connected between the pre-driver and the amplifier, the bias control circuit receiving at least one bias current from the output driver termination element of the amplifier, wherein the pre-driver, the amplifier and the bias control circuit are all formed on a same die.

CRLH lines including left-handed shunt inductors and left-handed series capacitors are provided on gate side transmission lines of a plurality of FETs.

An electronic device may include wireless circuitry with a baseband processor, a transceiver, and an antenna. The transceiver may include a mixer that outputs signals to a transimpedance amplifier. The mixer has an output impedance that varies depending on the frequency of operation. An adjustable resistance can be coupled to the input of the transimpedance amplifier. A control circuit can tune the adjustable resistance to compensate for changes in the output impedance of the mixer as the transceiver operates across a wide range of frequencies.

An electronic device may include wireless circuitry with a baseband processor, a transceiver, and an antenna. The transceiver may include a mixer that outputs signals to a transimpedance amplifier. The mixer has an output impedance that varies depending on the frequency of operation. An adjustable resistance can be coupled to the input of the transimpedance amplifier. A control circuit can tune the adjustable resistance to compensate for changes in the output impedance of the mixer as the transceiver operates across a wide range of frequencies.

A power amplifier has a number n of power cells A.sub.i, a number n of output transmission lines TL.sub.1i for combining output powers from the power cells, and a number n of impedance transformation network ITN.sub.i, where i=1, . . . n. The number n of output transmission lines are connected in series. The output terminal of each power cells is connected to its output transmission line via its impedance transformation network. Each impedance transformation network is an upward impedance transformation network for transforming an output impedance of each power cell at the input terminal of the impedance transformation network into a higher impedance at the output terminal of the impedance transformation network. A number n of input transmission lines TL.sub.0i (i=1, 2 . . . n)=connected in series. The input terminal of the i-th power cell is connected to the second terminal of the i-th transmission line via a capacitor, where i=1, . . . n.