Methods, apparatus, systems, and articles of manufacture are disclosed to generate a modulation protocol to output audio. An example apparatus includes a modulation circuit including a first input, a second input, a first output, and a second output; a first gate coupled to the first output of the modulation circuit; a second gate coupled to the second output of the modulation circuit; a first multiplexer including a first input coupled to the first output of the modulation circuit, a second input coupled to the output of the second gate, and an output coupled to a first switch; and a second multiplexer including a first input coupled to the second output of the modulation circuit, a second input coupled to the output of the first gate, and an output coupled to a second switch.

A circuit includes a field effect transistor (FET), a reference transistor having an output coupled to an output of the FET, an active bias circuit coupled to the reference transistor and configured to generate an input signal for the reference transistor in response to a change in drain current of the reference transistor due to carrier trapping and to apply the input signal to an input of the reference transistor, and a summing node coupled to an input of the FET and to the input of the reference transistor. The summing node adds the input signal to an input signal of the FET to compensate the carrier trapping effect.

Circuits and operating methods thereof for correcting phase errors introduced by amplifiers employing gallium nitride (GaN) transistors are described. The phase errors are caused by trapping effects exhibited by the GaN transistors. The circuits described herein pre-distort the phase of the input signal to compensate for the phase error introduced by the amplifier. Thereby, the phase of the output signal of the amplifier has a reduced phase error. For example, the output signal may have a near zero (or zero) phase error.

A compensation circuit includes a power amplifier, a current bias circuit, a power detection circuit and a current control circuit; the power detection circuit is configured to detect the voltage amplitude of the radio frequency input signal of the power amplifier and output a reference current when the voltage amplitude meets a preset condition; the current control circuit is configured to receive a reference current and output a compensation current to the current bias circuit based on the reference current; the current bias circuit is configured to receive the compensation current and generate the direct-current bias current, and output the compensation current and the direct-current bias current to the power amplifier; and the power amplifier is configured to receive the compensation current and the direct-current bias current, and amplify the power of the radio frequency input signal based on the compensation current and the direct-current bias current.

A compensator compensates for the distortions of a power amplifier circuit. A power amplifier neural network (PAN) is trained to model the power amplifier circuit using pre-determined input and output signal pairs that characterize the power amplifier circuit. Then a compensator is trained to pre-distort a signal received by the PAN. The compensator uses a neural network trained to optimize a loss between a compensator input and a PAN output, and the loss is calculated according to a multi-objective loss function that includes one or more time-domain loss function and one or more frequency-domain loss functions. The trained compensator performs signal compensation to thereby output a pre-distorted signal to the power amplifier circuit.

An amplitude modulation-phase modulation compensation circuit includes a detection circuit, a reconfigurable current control voltage source circuit and a phase shifting circuit, in which, the detection circuit is configured to detect the power of an input signal and output a control current according to the power of the input signal when the power of the input signal is greater than a preset power threshold; the reconfigurable current control voltage source circuit is configured to generate a bias voltage according to the control current; the phase shifting circuit is configured to compensate the AM-PM distortion of the radio frequency power amplifier according to the bias voltage. In this way, by the compensation circuit, when the power of the input signal is greater than a preset power threshold, the AM-PM distortion of the radio frequency power amplifier can be compensated according to the power of the input signal.

A harmonic processing circuit includes a first inductor having a first end connected to a connection line connected between an amplifier and an impedance matching circuit, and a second end connected to a first node, a first transmission line having a third end connected to the first node and a fourth end connected to a second node, and a parallel resonant circuit having a fifth end connected to the second node and a sixth end connected to a reference potential, wherein a second inductor and a first capacitor are connected in parallel between the fifth end and the sixth end, wherein when the first inductor is viewed from the connection line, an impedance at a frequency of a fundamental wave amplified by the amplifier is larger than an impedance at a frequency of a second harmonic having twice the frequency of the fundamental wave.

A circuit includes a main amplifier having a first input and a first output. A main bias circuit is coupled to the main amplifier, and the main bias circuit configured to operate the main amplifier in a first frequency band. A feedforward cancellation amplifier has a second input and a second output, in which the second input is coupled to the first input, and the second output is coupled to the first output. A filter is coupled between the first input and the second input. A feedforward bias circuit is coupled to the feedforward cancellation amplifier. The feedforward bias circuit is configured to operate the feedforward cancellation amplifier in a second frequency band within and narrower than the first frequency band.

Amplifiers, amplification circuits, and phase shifters, for example, for flexibly adjusting an output phase to thereby meet a requirement of a constant phase on a link in a communications field, are provided. In one aspect, an amplifier includes first, second, and third MOS transistors. The first MOS transistor includes a gate separately coupled to a signal input end and a bias voltage input end, a source coupled to a power supply, and a drain separately coupled to sources of the second and third MOS transistors. A drain of the third MOS transistor is coupled to a ground, and a drain of the second MOS transistor is coupled to a signal output end. The bias voltage input end is configured to receive a bias voltage to adjust a phase difference between an input signal at the signal input end and an output signal at the signal output end.

Disclosed herein are signal amplifiers having a plurality of amplifier cores. Individual amplifier cores can be designed to enhance particular advantages while reducing other disadvantages. The signal amplifier can then switch between amplifier cores in a particular gain mode to achieve desired performance characteristics (e.g., improving noise figure or linearity). Examples of signal amplifiers disclosed herein include amplifier architectures with a low noise figure amplifier core that reduces the noise figure and a linearity boost amplifier core that increases linearity. The disclosed signal amplifiers can switch between a first active core and a second active core for a single or particular gain mode to achieve desired signal characteristics during different time periods.