A system and method which includes receiving an input signal having an envelope and generating an envelope detection signal corresponding to the envelope. A bias current provided to an amplifier circuit is adjusted based upon the envelope detection signal, the amplifier circuit including an amplifier and a transformer. The transformer is configured to establish a magnetically coupled feedback loop from an output of the amplifier to an input of the amplifier. An output signal is provided, by the amplifier circuit, in response to the input signal.

This disclosure relates generally to the field of wireless communication infrastructure, and more particularly to a method, apparatus and system for envelope tracking. The system for envelope tracking comprising: a transistor; an RF transistor; a driver; a switcher current source; and a subtracting network; wherein the system is configured such that when an envelope voltage is less than a predetermined voltage value, the RF transistor is configured for decreasing an amount of absorbed biasing current, and when the envelope voltage is greater than a predetermined voltage value, the RF transistor is configured for increasing an amount of absorbed biasing current. The goal of RF transistor sinking is to absorb the redundant biasing current generated by the envelope tracking supply modulator to eliminate distortions.

An active electronically scanned array (AESA) includes a plurality of power amplifiers including first power amplifiers and second power amplifiers. The first power amplifiers are biased by a first drain voltage. The second power amplifiers are biased by a second drain voltage. The second drain voltage is different from the first drain voltage.

Bias arrangements for amplifiers are disclosed. An example bias arrangement for an amplifier includes a bias circuit, configured to produce a bias signal for the amplifier; a linearization circuit, configured to improve linearity of the amplifier by modifying the bias signal produced by the bias circuit to produce a modified bias signal to be provided to the amplifier; and a coupling circuit, configured to couple the bias circuit and the linearization circuit. Providing separate bias and linearization circuits coupled to one another by a coupling circuit allows separating a linearization operation from a biasing loop to overcome some drawbacks of prior art bias arrangements that utilize a single biasing loop.

The present invention relates to a method, of providing adaptive impedance in a Power Amplifier (PA), by providing more than one transistors in which one transistor is used to change the load line or to linearize the input signal by adapting the biasing of each transistor, wherein the transistors are connected in parallel.

A method, system and apparatus provide operation of an RF amplifier at a power level responsive to detected or expected conditions such as weather attenuation.

An amplifier system having: an amplifier having a linear operating region where an output signal produced by the amplifier at the output terminal has a power level increasing proportionally with the increasing input signal power level up to a compression region of the amplifier where the output power is inhibited from increasing with increasing input signal power; and a DC current limiting circuit, coupled between a DC power supply and the amplifier, to: supply DC current from the DC power supply that is equal to quiescent current to the amplifier from the DC power supply when the amplifier operates in the linear region; enable the amplifier to draw increasing DC current from the DC power supply above the quiescent current with increasing input signal power until the output signal power reaches the desired compression point level which is lower than that of a stand-alone amplifier without the DC current limiting circuit; and, then limits the current drawn by the amplifier from the DC power supply.

The invention relates to a sequential broadband Doherty power amplifier with adjustable output power back-off The sequential broadband Doherty power amplifier has at least one input (I.sub.1, I.sub.2; RF.sub.in) for receiving at least one broadband HF signal, wherein the broadband HF signal or broadband HF signals (RF.sub.in) have at least an average power level (carrier/average) and a peak envelope power level (peak), with the average power level and the peak envelope power level defining a crest factor, and a first amplifier branch for amplifying the input signal, with the first amplifier branch providing the amplification substantially for the low and at least the average power level, at least one second amplifier branch for amplifying the input signal, wherein the second amplifier branch substantially provides the amplification for the peak envelope power level, wherein the output of the first amplifier branch is connected via an impedance inverter (Z.sub.T) to the output of the second amplifier branch, the junction (CN) being connected to the load (Z.sub.0) in a substantially directly impedance-matched manner, wherein the first and the second amplifier branch each have a supply voltage, with at least one of the supply voltages being variable as a function of the crest factor of the signal to be amplified, and wherein the signal propagation delay through the at least two amplifier branches is substantially identical in the operating range.

An audio reproduction apparatus is shown and includes an amplifier with a power amplification stage having transistors in a push-pull arrangement. A bias generator biases the transistors with a standing current. A processor receives a data stream comprising digital samples of an analog audio signal and analyzes the peak level of each group. It then determines the appropriate standing currents to maintain Class A operation of the power amplification stage given the peak levels of each of the groups. A digital to analog converter produces an analog input signal for the input stage of the amplifier from the data stream. A feedforward path between the processor and the bias generator allows the standing current to be adjusted prior to the arrival of the analog input signal in the power amplification stage.

Provided are a gain compensation device and a bias circuit device. A compensation bias current is generated by the gain compensation device to compensate the gain deviation of power amplifier and improve stability of power amplifier. Through high-temperature compensation unit and low-temperature compensation unit in different gears, gain of power amplifier is compensated along with temperature changes, thereby improving feasibility of the gain compensation device. It takes small space, and the circuit only includes the circuits corresponding to high-temperature compensation unit and low-temperature compensation unit, so the circuit is relatively simple and beneficial to miniaturization. In the bias circuit device, based on an initial bias current provided by a bandgap reference, the gain compensation device is added to generate a compensation bias current, and the initial bias current and compensation bias current are superimposed, so that the gain of power amplifier is further compensated, which improves stability of power amplifier.