Amplifier devices includes a first amplifier connected to receive an input voltage. The first amplifier outputs an internal voltage. These structures also include a second amplifier having an input node connected to receive the internal voltage and an output node outputting an output voltage. A resistive feedback loop is connected to the input node and the output node of the second amplifier. A first cross-coupled bandwidth boosting stage is connected to the input node of the second amplifier and a second cross-coupled bandwidth boosting stage connected to the output node of the second amplifier. The cross-coupled bandwidth boosting stages form a distributed differential positive feedback structure.

Provided is a reception circuit that suppresses skew of a waveform of a signal and enables high-speed data communication.

A reception circuit according to the present disclosure includes: a first differential stage that receives a first input signal and a second input signal at a first input unit and a second input unit, respectively, and causes first and second currents corresponding to the first and second input signals, respectively, to flow; a second differential stage including a first current path that generates and outputs a first amplified signal corresponding to the first current and a second current path that generates and outputs a second amplified signal corresponding to the second current; a power supply line that supplies power to the first and second differential stages; and at least one variable resistance unit provided in the first or second current path.

A class-D amplifier includes measurement of speaker current via the low-side drive transistors of the amplifier. In one embodiment, a class-D amplifier includes two high-side transistors, two low-side transistors, a first sense resistor, a second sense resistor, and a sigma delta analog to digital converter (σΔ ADC). The two high-side transistors and two low-side transistors are connected as a bridge to drive a bridge tied speaker. The first sense resistor is connected between a first of the low-side transistors and a low-side reference voltage. The second sense resistor is connected between a second of the low-side transistors and the low-side reference voltage. The ΣΔ ADC is coupled to the bridge to measure voltage across the first sense resistor and the second sense resistor.

A method for calibrating an isolator product includes receiving a calibration signal on a differential pair of nodes of a receiver signal path of a first integrated circuit die of the isolator product. The method includes generating a diagnostic signal having a level corresponding to an average amplitude of the calibration signal on the differential pair of nodes. The method includes configuring a programmable receiver signal path based on the diagnostic signal. Generating the diagnostic signal may include providing an analog signal based on a full-wave rectified version of the calibration signal on the differential pair of nodes. Generating the diagnostic signal may include converting the analog signal to a digital signal.

A receiver circuit is disclosed. The receiver circuit includes an amplifier configured to generate an RF signal based on a received signal, where the RF signal includes an information signal and a blocker signal modulating an RF carrier frequency. The receiver circuit also includes an RF filter connected to the amplifier, where the RF filter is configured to selectively attenuate the blocker signal.

An amplifier circuit comprises a multi-stage amplifier having a plurality of amplifiers cascaded between an input port V.sub.in and an output port V.sub.out to form a differential input stage and N subsequent gain stages, a capacitive load C.sub.L coupled to the output port V.sub.out, and a compensation network coupled to the multi-stage amplifier and configured for positioning Pole-Zero pairs of each stage of the multi-stage amplifier below a unity gain frequency ω.sub.t of the multi-stage amplifier when compensated, with Zeros positioned lower than Poles so as to increase the unity gain frequency ω.sub.t.

Provided is a high-gain amplifier based on double-gain boosting including a first gain amplification unit including a first amplifier, a second amplifier, and a an interstage matching network connected between the first amplifier and the second amplifier and performing primary amplification; and a second gain amplification unit connected in parallel with the first gain amplification unit and performing secondary boosting.

A dual-band MMIC power amplifier and method of operation to amplify frequencies in different RF bands while only requiring input drive signals at frequencies f.sub.1 and f.sub.2 in a narrow RF input band. This allows for the use of a conventional narrowband RF IC to drive the MMIC and does not require additional circuitry (e.g., a LO) on the MMIC power amplifier. The matching network of the last amplification stage is modified to pass f.sub.1 (or a harmonic thereof), reflect f.sub.2, pass a P.sup.th harmonic of f.sub.2 where P is 2 or 3 and to reflect any unused 1.sup.st, 2.sup.nd or 3.sup.rd order harmonics of f.sub.1 or f.sub.2 back into the MMIC. In response to an input signal at f.sub.1, the MMIC power amplifier amplifies and outputs a signal at f.sub.1 (or a harmonic thereof). In response to an input signal at f.sub.2 at sufficient RF power, the last amplification stage operates in compression such that the MMIC power amplifier generates the harmonics, selects the P.sup.th harmonic and outputs an amplified RF signal at P*f.sub.2.

An amplification device includes an amplification unit, an impedance unit and a log power detector. The amplification unit includes an input terminal for receiving a radio-frequency signal, an output terminal for outputting an amplified radio-frequency signal, and a detected terminal for outputting a detected signal related to the radio-frequency signal. The impedance unit is used to provide an impedance. The impedance unit includes an input terminal coupled to the detected terminal of the amplification unit for receiving the detected signal, and an output terminal for outputting a power signal. The log power detector is used to generate a power indication signal according to the power signal. The log power detector includes an input terminal coupled to the output terminal of the impedance unit, and an output terminal for outputting the power indication signal.

An asymmetric signal path approach is used to extract differential signals out of the photodetector (e.g., a photodiode) for amplification by a differential transimpedance amplifier (TIA). This asymmetric-path differential TIA configuration has less low-frequency Inter Symbol Interference (ISI) (also known as Baseline Wander), less high-frequency noise amplification, and higher bandwidth capabilities. There is no power penalty with this design in comparison to a single-ended TIA, can extend the range of the link for a given system power consumption, and can decrease transmitter power for a given range.