Components of a power amplifier controller may support lower voltages than the power amplifier itself. As a result, a surge protection circuit that prevents a power amplifier from being damaged due to a power surge may not effectively protect the power amplifier controller. Embodiments disclosed herein present an overvoltage protection circuit that prevents a charge-pump from providing a voltage to a power amplifier controller during a detected surge event. By separately detecting and preventing a voltage from being provided to the power amplifier controller during a surge event, the power amplifier controller can be protected regardless of whether the surge event results in a voltage that may damage the power amplifier. Further, embodiments of the overvoltage protection circuit can prevent a surge voltage from being provided to a power amplifier operating in 2G mode.

Integrated circuits, such as power amplifier integrated circuits, are disclosed containing compact-footprint, vertically-integrated capacitor-avalanche diode (AD) structures. In embodiments, the integrated circuit includes a semiconductor substrate, a metal layer system, and a vertically-integrated capacitor-AD structure. The metal layer system includes, in turn, a body of dielectric material in which a plurality of patterned metal layers are located. The vertically-integrated capacitor-AD structure includes a first AD formed, at least in part, by patterned portions of the first patterned metal layer. A first metal-insulator-metal (MIM) capacitor is also formed in the metal layer system and at least partially overlaps with the first AD, as taken along a vertical axis orthogonal to the principal surface of the semiconductor substrate. In certain instances, at least a majority, if not the entirety of the first AD vertically overlaps with the first MIM capacitor, by surface area, as taken along the vertical axis.

An amplifier may include multiple transistors with two transistors having their gates tied together via a common connection. The amplifier may utilize a local common mode feedback resistor as part of the amplifier. The local common mode feedback resistor may be coupled between the common connection and respective terminals of two transistors of multiple transistors. The local common mode feedback resistor may include a group of resistors coupled in series. The local common mode feedback resistor may also include a metal oxide semiconductor (MOS) resistor coupled in parallel with one or more of the first group of resistors. In the local common mode feedback, the first MOS resistor provides different levels of resistance to different process corners to reduce overshoot when the amplifier is enabled.

Systems and apparatuses are disclosed that include a distributed power system configured to provide power to a number of loads. The system includes power converters configured to receive DC power from a common power source, each of the plurality of power converters configured to provide DC power to a corresponding load from. Each of the power converters is positioned proximal to the corresponding load that it powers.

Monolithic microwave integrated circuits (MMICs) tolerant to electrical overstress are provided. In certain embodiments, a MMIC includes a signal pad that receives a radio frequency (RF) signal, and an RF circuit coupled to the RF signal pad. The RF circuit includes a transistor layout, an input field-effect transistor (FET) implemented using a first portion of a plurality of gate fingers of the transistor layout, and an embedded protection device electrically connected between a gate and a source of the input FET and implemented using a second portion of the plurality of gate fingers. The MMIC is tolerant to electrical overstress events, such as field-induced charged-device model (FICDM) events.

A power amplifier may be configured to operate in an on state and an off state. The power amplifier may include a plurality of transistors and an impedance controller circuit. The plurality of transistors may be electrically coupled to an electrical ground and an output of the power amplifier. The impedance controller circuit may be electrically coupled to the plurality of transistors and a reference voltage. The impedance controller circuit may be configured to provide the reference voltage to the plurality of transistors when the power amplifier is in the off state to cause a leakage current to flow between the reference voltage and the electrical ground.

Apparatus and methods for power amplifier signal limiting are disclosed. In certain embodiments, a power amplifier system includes a power amplifier that amplifies a radio frequency input signal, and a signal limiter operable to limit a signal power of the power amplifier when the radio frequency input signal exceeds a threshold. The signal limiter includes a radio frequency detector configured to generate a detection signal based on detecting a power level of the radio frequency input signal, and a latch configured to lock the signal limiter into an attenuating mode in response to the detection signal indicating that the threshold is exceeded.

A power amplifier includes an over-current protection loop and/or an over-voltage protection loop to assist in preventing operation outside a safe operation zone. In a further exemplary aspect, triggering of the over-current protection loop adjusts a threshold voltage for the over-voltage protection loop. In further exemplary aspects, the over-current protection loop may adjust not only a bias regulator, but also provide an auxiliary control signal that further limits signals reaching the power amplifier. In still further exemplary aspects, the over-voltage protection loop may operate independently of the over-current protection current loop or the over-voltage protection loop contribute to an over-current protection signal.

An amplifier overload power limit circuit, system, and a method thereof comprising a monitoring of a current gain of a BJT based on a current detector and limiting power to the BJT based on the monitored current gain to prevent the BJT from driven into a saturation mode and the amplifier overdrive.

Differential input circuits employ protection transistors and feedback paths to limit the differential voltage applied to input transistors. In an example arrangement, a differential input voltage is applied to terminals of the protection transistors, and current paths couple the respective protection transistors to control terminals of the input transistors, respectively. A control terminal drive voltage source is coupled to the control terminals of the input protection transistors to control the drive voltage applied to those terminals. Feedback paths, one for each of the input transistors, control voltages applied to the control terminals of the input transistors, maintaining the input differential voltage at a relatively low level and defined by the product of a specified current value and a specified resistance value.