H03F2200/48

Envelope tracking supply modulator topology for wipe-bandwidth radio frequency transmitter

A package or a chip including a linear amplifier and a power amplifier is provided, wherein the linear amplifier is configured to receive an envelope tracking signal to generate an amplified envelope tracking signal, the power amplifier is supplied by an envelope tracking supply voltage comprising a DC supply voltage and the amplified envelope tracking signal, and the power amplifier is configured to receive an input signal to generate an output signal.

Operating a high-frequency driver circuit
11550174 · 2023-01-10 · ·

A high-frequency (HF) driver circuit for an acousto-optical component includes an HF power amplifier connected to a voltage regulator for supply with a supply voltage and a bias voltage generator connected to an input of the HF power amplifier via a switch. The HF driver circuit can include a measurement device configured to measure a temperature of the HF power amplifier and a compensation device configured to control the bias voltage generator according to the temperature. The bias voltage generator is configured to provide a bias voltage to the HF power amplifier. By switching in the bias voltage, the HF power amplifier can be adjusted to a low quiescent current. By switching off the bias voltage, the HF power amplifier can be very rapidly and effectively blocked. As a result, very rapid switching-on and switching-off times, e.g., in a range of 10 to 50 ns, can be achieved.

MULTIPLE-STAGE DOHERTY POWER AMPLIFIERS IMPLEMENTED WITH MULTIPLE SEMICONDUCTOR TECHNOLOGIES

A device includes an integrated circuit (IC) die. The IC die includes a silicon germanium (SiGe) substrate, a first RF signal input terminal, a first RF signal output terminal, a first amplification path between the first RF signal input terminal and the first RF signal output terminal, a second RF signal input terminal, a second RF signal output terminal, and a second amplification path between the second RF signal input terminal and the second RF signal output terminal. The device includes a first power transistor die including a first input terminal electrically connected to the first RF signal output terminal and a second power transistor die including a second input terminal electrically connected to the second RF signal output terminal. The first amplification path can include two heterojunction bipolar transistors (HBTs) connected in a cascode configuration and the second amplification path can include two HBTs connected in a cascode configuration.

Compact architecture for multipath low noise amplifier
11539334 · 2022-12-27 · ·

Methods and devices used in mobile receiver front end to support multiple paths and multiple frequency bands are described. The presented devices and methods provide benefits of scalability, frequency band agility, as well as size reduction by using one low noise amplifier per simultaneous outputs. Based on the disclosed teachings, variable gain amplification of multiband signals is also presented.

LOAD MODULATED POWER AMPLIFIERS
20220385237 · 2022-12-01 ·

Apparatus and methods for load modulated power amplifiers are provided. In certain embodiments, a load modulated power amplifier system includes a power amplifier that receives a radio frequency signal at an input and provides an amplified radio frequency signal at an output, and a controllable load impedance coupled to the output of the power amplifier. The controllable load impedance receives an envelope signal that changes in relation to an envelope of the radio frequency signal, and the envelope signal is operable to control an impedance of the controllable load impedance to modulate a load at the output of the power amplifier.

RECONFIGURABLE AMPLIFIER

A reconfigurable amplifier includes a first transistor having a gate coupled to an input of the reconfigurable amplifier, and a source coupled to a ground. The reconfigurable amplifier also includes a gate control circuit, and a second transistor having a gate coupled to the gate control circuit, a source coupled to a drain of the first transistor, and a drain coupled to an output of the reconfigurable amplifier, wherein the gate control circuit is configured to output a bias voltage to the gate of the second transistor in a cascode mode, and output a switch voltage to the gate of the second transistor in a non-cascode mode. The reconfigurable amplifier further includes a load coupled to the output of the reconfigurable amplifier.

Substrate comprising capacitor configured for power amplifier output match

A device that includes a substrate and a power amplifier coupled to the substrate. The substrate includes at least one dielectric layer, a plurality of interconnects, and a capacitor configured to operate as an output match element, where the capacitor is defined by a plurality of capacitor interconnects. The power amplifier is coupled to the capacitor. The capacitor is configured to operate as an output match element for the power amplifier. The substrate includes an inductor coupled to the capacitor, where the inductor is defined by at least one inductor interconnect. The capacitor and the inductor are configured to operate as a resonant trap or an output match element.

DISTRIBUTED POWER MANAGEMENT CIRCUIT
20230081095 · 2023-03-16 ·

A distributed power management circuit is provided. In embodiments disclosed herein, the distributed power management circuit can achieve multiple performance enhancing objectives simultaneously. More specifically, the distributed power management circuit can be configured to switch a modulated voltage from one voltage level to another within a very short switching window, reduce in-rush current required for switching the modulated voltage, and minimize a ripple in the modulated voltage, all at same time. As a result, the distributed power management circuit can be provided in a wireless device (e.g., smartphone) to enable very fast voltage switching across a wide modulation bandwidth (e.g., 400 MHz) with reduced power consumption and voltage distortion.

Body tie optimization for stacked transistor amplifier

A transistor stack can include a combination of floating and body tied devices. Improved performance of the RF amplifier can be obtained by using a single body tied device as the input transistor of the stack, or as the output transistor of the stack, while other transistors of the stack are floating transistors. Transient response of the RF amplifier can be improved by using all body tied devices in the stack.

MULTI-VOLTAGE GENERATION CIRCUIT
20230118768 · 2023-04-20 ·

A multi-voltage power generation circuit is disclosed. More specifically, the multi-voltage generation circuit includes multiple voltage modulation circuits that are configured to generate and maintain multiple modulated voltages. In a non-limiting example, the multiple modulated voltages can be used for amplifying multiple radio frequency (RF) signals concurrently. Contrary to using multiple direct-current (DC) to DC (DC-DC) converters for generating the multiple modulated voltages, the voltage modulation circuits are configured to share a single current modulation circuit based on time-division. By sharing a single current modulation circuit among the multiple voltage modulation circuits, it is possible to concurrently support multiple load circuits (e.g., power amplifier circuits) with significantly reduced footprint.