Patent classifications
H03F2200/75
Method and circuit to isolate body capacitance in semiconductor devices
Disclosed is an amplifying circuit and method. In one embodiment, an amplifying circuit, includes: a common-gate (CG) amplifier, wherein the CG amplifier comprises a first transistor, wherein source terminal and body terminal of the first transistor is coupled together through a first resistor.
BIASED TRANSISTOR MODULE
A biased-transistor-module comprising: a module-input-terminal; a module-output-terminal; a reference-terminal; a module-supply-terminal configured to receive a supply voltage; a module-reference-voltage-terminal configured to receive a module reference voltage; a main-transistor having a main-control-terminal, a main-first-conduction-channel-terminal and a main-second-conduction-channel-terminal, wherein the main-first-conduction-channel-terminal is connected to the module-output-terminal, and the main-second-conduction-channel-terminal is connected to the reference-terminal, and the main-control-terminal is connected to an input-signal-node, wherein the input-signal-node is connected to the module-input-terminal; and a bias-circuit. The bias-circuit comprises: a first-bias-transistor; a first-bias-resistor; a second-bias-transistor; and a second-bias-resistor.
TRANSIMPEDANCE AMPLIFIER
A transimpedance amplifier (TIA) for converting an input current at an input node into an output voltage at an output node, the TIA comprising: a first amplifier stage having a first input coupled to the input node and a first output; a feedback path between the first output and the first input; a second amplifier stage in the feedback path having a second input, the second input coupled to the first output of the first amplifier stage; a feedback resistor in the feedback path coupled between an output of the second amplifier stage and first input of the first amplifier stage; and an output stage, comprising: a load resistor coupled between a reference voltage node and a T-coil, the T-coil comprising first and second inductors coupled in series at an inductor node, the T-coil coupled between the first output and the load resistor, the inductor node coupled to the output node of the TIA.
High efficiency current source/sink DAC
A current source and/or current sink digital-to-analog converter (DAC) includes a DAC circuit that converts a digital code to an analog current or voltage signal, an optional transconductance circuit that converts a voltage output of the DAC circuit into a current signal, and an output circuit that amplifies a current output of the DAC circuit or optionally amplifies a current output of the transconductance circuit to set a desired high current output for application to an output of the current source and/or current sink DAC. A power supply control current may be coupled to a power supply circuit that supplies power to the output circuit of the current source and/or current sink DAC. The power supply control current adjusts the output of the power supply circuit to cause the current source and/or current sink DAC to operate at a higher power efficiency.
AMPLIFIER FOR A RADIO FREQUENCY RECEIVER
In an embodiment an amplifier includes a first MOS transistor having a drain connected to an output of the amplifier and a source coupled to a first node configured to receive a first power supply potential, a first capacitive element connected between an input of the amplifier and a gate of the first MOS transistor, a first current source connecting the drain of the first MOS transistor to a second node configured to receive a second power supply potential and a resistive element and a second capacitive element connected in parallel between the gate and the drain of the first MOS transistor, the resistive element including a switched capacitor.
Power amplifier with a power transistor and an electrostatic discharge protection circuit on separate substrates
An amplifier includes a semiconductor die and a substrate that is distinct from the semiconductor die. The semiconductor die includes a III-V semiconductor substrate, a first RF signal input terminal, a first RF signal output terminal, and a transistor (e.g., a GaN FET). The transistor has a control terminal electrically coupled to the first RF signal input terminal, and a current-carrying terminal electrically coupled to the first RF signal output terminal. The substrate includes a second RF signal input terminal, a second RF signal output terminal, circuitry coupled between the second RF signal input terminal and the second RF signal output terminal, and an electrostatic discharge (ESD) protection circuit. The amplifier also includes a connection electrically coupled between the ESD protection circuit and the control terminal of the transistor. The substrate may be another semiconductor die (e.g., with a driver transistor and/or impedance matching circuitry) or an integrated passive device.
Signal processing device, amplifier, and method
An active electronic device that enables bidirectional communication over a single antenna or path is disclosed. The device may be characterized by a forward path (from an input to an antenna port) offering high gain, and a reverse path (to a receiver port) that can be configured as an finite impulse response (“FIR”) filter. An amplifier of the device is disclosed, the amplifier allowing for tuning of output resistance using passive mixers.
MULTIPLE-STAGE DOHERTY POWER AMPLIFIERS IMPLEMENTED WITH MULTIPLE SEMICONDUCTOR TECHNOLOGIES
A device includes an integrated circuit (IC) die. The IC die includes a silicon germanium (SiGe) substrate, a first RF signal input terminal, a first RF signal output terminal, a first amplification path between the first RF signal input terminal and the first RF signal output terminal, a second RF signal input terminal, a second RF signal output terminal, and a second amplification path between the second RF signal input terminal and the second RF signal output terminal. The device includes a first power transistor die including a first input terminal electrically connected to the first RF signal output terminal and a second power transistor die including a second input terminal electrically connected to the second RF signal output terminal. The first amplification path can include two heterojunction bipolar transistors (HBTs) connected in a cascode configuration and the second amplification path can include two HBTs connected in a cascode configuration.
Compact architecture for multipath low noise amplifier
Methods and devices used in mobile receiver front end to support multiple paths and multiple frequency bands are described. The presented devices and methods provide benefits of scalability, frequency band agility, as well as size reduction by using one low noise amplifier per simultaneous outputs. Based on the disclosed teachings, variable gain amplification of multiband signals is also presented.
Power amplifier
The present disclosure is to improve the power added efficiency of a power amplifier at high output power. The power amplifier includes: a first capacitor with a radio frequency signal input to one end thereof; a first transistor whose base is connected to the other end of the first capacitor to amplify the radio frequency signal; a bias circuit for supplying bias to the base of the first transistor; and a second capacitor with one end connected to the base of the first transistor and the other end connected to the emitter of the first transistor.