An electronic circuit is provided. The electronic circuit includes a first current generating circuit configured to output a first operating current based on a first operating voltage; and an input circuit configured to: receive a first current corresponding to a first input voltage and a second current corresponding to a second input voltage, wherein the first current and the second current are based on the first operating current; receive a third current and a fourth current that are generated based on the first operating voltage; and generate a fifth current corresponding to the second input voltage based on a second operating current. The electronic circuit is configured to generate an output voltage that is associated with a difference between the first input voltage and the second input voltage based on the second current, the fourth current and the fifth current, and the fourth current corresponds to the third current.

Aspects of the present disclosure provide a method for regulating an integration current of a sensing amplifier. The sensing amplifier includes a first input transistor and a second input transistor, wherein a source of the first input transistor and a source of the second input transistor are coupled to a source node. The method includes pulling a current from or sourcing the current to the source node, measuring the integration current, comparing the measured integration current with a reference signal, and adjusting the current pulled from or sourced to the source node based on the comparison.

A current feedback amplifier (CFA). The CFA includes a common-gate input stage, a biasing circuitry, and a differential pair coupled in parallel between the supply voltage node and the reference voltage node. The common-gate input stage amplifies an input signal received at an input node and supplies it to a gate of the complementary transistors of the differential pair. The biasing circuitry supplies a bias voltage to a gate of the transistors of the common-gate input stage. The input node of the common-gate input stage and a node between the complementary transistors in the first path of the differential pair are shorted.

One or more systems, devices and/or methods of use provided herein relate to a device that can support a signal generation. A current-mode end-to-end signal path can include a digital to analog converter (DAC) operating in current-mode and an upconverting mixer, operating in current-mode and operatively coupled to the DAC. Analog inputs and outputs of the DAC and upconverting mixer can be represented as currents, and the DAC can generate a baseband signal. The DAC and upconverting mixer each can comprise switching transistors of the same type, such as p-type metal-oxide semiconductor (PMOS) switching transistors. In one or more embodiments, a current source and a diode-connected transistor can be arranged in parallel in the current-mode signal path, and the current source passes a static current, while the diode-connected transistor passes both a static current and a dynamic current.

One or more systems, devices and/or methods of use provided herein relate to a baseband filter that can be used in a current-mode end-to-end signal path. The current-mode end-to-end signal path can include a digital to analog converter (DAC) operating in current-mode and an upconverting mixer, operating in current-mode and operatively coupled to the DAC. In one or more embodiments, a device used in the signal path can comprise a baseband filter that receives an input current and outputs an output current. The baseband filter can comprise a feedback loop component having an active circuit branch and a passive circuit branch coupled in a loop. A mirroring device can be coupled to the feedback loop component and can provide an output of the device. Selectively activating the mirroring device can vary gain, such as of the mirroring device.

An embodiment voltage-current converter circuit comprises a first amplifier and a second amplifier having homologous first input nodes configured to receive a voltage signal therebetween as well as homologous second input nodes having a resistor coupled therebetween. First and second current mirror circuits are provided comprising first input transistors having their control terminal coupled to the output nodes of the amplifiers. First and second current sensing circuitry having first and second current output nodes are coupled to the current mirror output nodes of the current mirror circuits and configured to provide therebetween a current which is a function of the voltage signal between the homologous first input nodes of the amplifier.

A cell includes a first pair and a second pair of MOS transistors. Each of the first pair and second pair of MOS transistors have drain electrodes coupled to a respective common input node. Each of the first pair and second pair of MOS transistors includes a diode-connected MOS transistor and a latched MOS transistor. The latched MOS transistors of the first pair and second pair of MOS transistors have cross-coupled gate and drain electrodes. Source electrodes of the diode connected MOS transistors from the first pair and second pair of MOS transistors are coupled to a first current output common node to output a current to a first current collecting circuit. Source source electrodes of the latched MOS transistors of the first pair and second pair of MOS transistors are coupled to a second current output common node to output a current to a second current collecting circuit.

To provide a current detection circuit capable of suppressing the occurrence of a large potential difference between input terminals of a differential amplifier circuit, and preventing degradation of input transistors. A differential amplifier circuit is equipped with a clamp circuit which limits gate-source voltages of a pair of PMOS transistors each having a bulk and a source connected to each other with the sources of the pair of PMOS transistors as input terminals.

One or more embodiments relate to a multi-bias mode current conveyor. Such a current conveyor may include an input terminal, a reference terminal, an output terminal, a first and second cascoded current mirrors, and a biasing circuit. The first cascoded current mirror and a second cascoded current mirror may be arranged as a current conveyor that is configured to provide an output current that a mirror of an input current. The biasing circuit may be configured to provide a bias voltage selectively exhibiting a first voltage level or a second voltage level. The bias voltage may be provided at least partially responsive to a state of the input current. The biasing circuit may be arranged to apply the bias voltage to at least one of the first cascoded current mirror or the second cascoded current mirror.

The present application discloses a transconductance amplifier and a related chip. The transconductance amplifier is configured to generate an output current according to a positive input voltage and a negative input voltage, wherein the transconductance amplifier includes: an input stage, configured to receive the positive input voltage and the negative input voltage and generate a positive output current and a negative output current, wherein the input stage includes: a first transistor, wherein a gate thereof is coupled to the positive input voltage; a second transistor, wherein a gate thereof is coupled to the negative input voltage; a first resistor, serially connected between the first transistor and the second transistor; a third transistor, wherein a source of the third transistor is coupled between the first resistor and the first transistor, and a drain of the third transistor is configured to output the positive output current; and a fourth transistor.