A calibration amplifier includes: a plurality of transistors and a variable resistor configured to change in response to clock pulses. During a calibration cycle, one of the plurality of transistors switches on in each calibration step based on a plurality of enable signals, and a gain of the calibration amplifier changes until an output voltage of the calibration amplifier exceeds a reference voltage and is set to a calibrated gain. The calibration amplifier outputs the output voltage by amplifying an input voltage using the calibrated gain.

An envelope detection circuit and methods for detecting an envelope of a signal using such an envelope detection circuit. One example envelope detection circuit generally includes a first diode, a capacitive element, and a clamping circuit. The first diode has an anode coupled to an input node of the envelope detection circuit and has a cathode coupled to an output node of the envelope detection circuit. The capacitive element is coupled in shunt between the output node and a reference potential node, and the clamping circuit is coupled in shunt between the input node and the reference potential node. The clamping circuit generally includes a resistive element coupled in series with a second diode.

An amplifier circuit comprising: an amplifier; an output limiter for providing a variable impedance comprising: a first and second limiter terminal; a transistor comprising a conduction channel; a first resistor coupled in parallel with the conduction channel; and a capacitor coupled in series with the conduction channel between the conduction channel and the first or second limiter terminal; and a feedback control unit comprising a comparator block configured to provide a control signal to the output limiter based on a comparison of the amplifier output signal and a setting voltage; wherein: the first limiter terminal is coupled to the amplifier input or output; the second limiter terminal receives a reference voltage; and wherein receipt of the control signal at the transistor provides for a variable impedance for the amplifier circuit dependent on the amplifier output signal.

A gain compression compensation circuit of a radio frequency power amplifier includes: a low-pass filtering module configured to receive a part of radio frequency signals output from a first power amplification transistor and to filter, from the part of radio frequency signals, radio frequency signals with a frequency above a fundamental wave to obtain a filtered signal; and a rectifying module configured to receive the filtered signal output by the low-pass filtering module and to rectify the filtered signal to obtain a rectified current; and to output the rectified current to a bias transistor and superimpose the rectified current with a bias current I.sub.bias to flow into the bias transistor.

A wireless repeater is disclosed. The wireless repeater can include a main booster with a first gain unit with a first adjustable gain and a second gain unit with a second adjustable gain. The wireless repeater can include a front end booster communicatively coupled to the main booster, with a coaxial cable coupled between the main booster and the front end booster. A test signal generator is configured to generate a direct current test signal or a radio frequency test signal to determine a signal loss of the coaxial cable. The wireless repeater can include a control unit to adjust one or more of the first adjustable gain or the second adjustable gain based on the determined signal loss of the coaxial cable.

A signal booster is disclosed that includes a first interface port, a second interface port, a third interface port, a downlink signal splitter device, an uplink signal splitter device, a main booster and a front-end booster. The uplink signal splitter device can include a first uplink splitter port configured to direct uplink signals from the second interface port towards the first interface port. The uplink signal splitter device can include a second uplink splitter port configured to direct uplink signals from the third interface port towards the first interface port. The main booster can include a main downlink amplification path and a main uplink amplification path. The front-end booster can include a front-end downlink amplification path and a front-end uplink amplification path.

An optical detection circuit includes: a first optical detection element having a first anode and a first cathode, the first optical detection element being configured to generate voltage between the first anode and the first cathode due to photoelectromotive force generated in accordance with incident-light quantity; and a first operational amplifier having a first non-inverting input terminal, a first inverting input terminal, and a first output terminal, in which the first non-inverting input terminal is connected to fixed potential, one of the first anode and the first cathode is connected to the first inverting input terminal, and the other of the first anode and the first cathode is connected to the first output terminal.

A gain compression compensation circuit of a radio frequency power amplifier includes: a low-pass filtering module configured to receive a part of radio frequency signals output from a first power amplification transistor and to filter, from the part of radio frequency signals, radio frequency signals with a frequency above a fundamental wave to obtain a filtered signal; and a rectifying module configured to receive the filtered signal output by the low-pass filtering module and to rectify the filtered signal to obtain a rectified current; and to output the rectified current to a bias transistor and superimpose the rectified current with a bias current I.sub.bias to flow into the bias transistor.

A transistor circuit includes a transistor having a gate terminal and first and second conduction terminals, a first circuit configured to convert an AC input signal of the transistor circuit to a gate bias voltage and to apply the gate bias voltage to the gate terminal of the transistor, a second circuit configured to convert the AC input signal of the transistor circuit to a control voltage, and a switching circuit configured to apply a first voltage to the first conduction terminal of the transistor in response to the control voltage.

An optical detection circuit includes: a first optical detection element having a first anode and a first cathode, the first optical detection element being configured to generate voltage between the first anode and the first cathode due to photoelectromotive force generated in accordance with incident-light quantity; and a first operational amplifier having a first non-inverting input terminal, a first inverting input terminal, and a first output terminal, in which the first non-inverting input terminal is connected to fixed potential, one of the first anode and the first cathode is connected to the first inverting input terminal, and the other of the first anode and the first cathode is connected to the first output terminal.