A power amplifier output stage includes a first output array group having a first plurality of semiconductor devices, and a first loading adjustment module coupled to the first output array group. The first loading adjustment module is configured to adjust a loading of the first output array group to produce a first power dissipation value associated with the first output array group. The power amplifier output stage further includes a second output array group having a second plurality of semiconductor devices, and a second source loading adjustment module coupled to a second input of the second output array. The second source loading adjustment module is configured to adjust a source loading of the second output array group to produce a second power dissipation value associated with the second output array group, the first power dissipation value being different from the second power dissipation value.

An embodiment of a dual-path amplifier includes a power splitter connected to first and second power amplifiers respectively connected to first and second transmission lines connected to a power combiner having a phase-offset deficit at the second harmonic frequency 2f0, where the first and second transmission lines are designed to provide a complementary phase offset at 2f0 substantially equal to the phase-offset deficit such that the two amplified signals will be combined at the power converter with a total phase offset at 2f0 of about 180 degrees in order to reduce harmonic distortion in the amplified output signal, without substantially diminishing the output power at the fundamental frequency f0. In certain PCB-based implementations, the transmission lines include metal traces and lumped elements providing different impedance transformations that achieve the complementary phase offset, where the metal traces may have significantly different physical and electrical characteristics.

A dual-band MMIC power amplifier and method of operation to amplify frequencies in different RF bands while only requiring input drive signals at frequencies f.sub.1 and f.sub.2 in a narrow RF input band. This allows for the use of a conventional narrowband RF IC to drive the MMIC and does not require additional circuitry (e.g., a LO) on the MMIC power amplifier. The matching network of the last amplification stage is modified to pass f.sub.1 (or a harmonic thereof), reflect f.sub.2, pass a P.sup.th harmonic of f.sub.2 where P is 2 or 3 and to reflect any unused 1.sup.st, 2.sup.nd or 3.sup.rd order harmonics of f.sub.1 or f.sub.2 back into the MMIC. In response to an input signal at f.sub.1, the MMIC power amplifier amplifies and outputs a signal at f.sub.1 (or a harmonic thereof). In response to an input signal at f.sub.2 at sufficient RF power, the last amplification stage operates in compression such that the MMIC power amplifier generates the harmonics, selects the P.sup.th harmonic and outputs an amplified RF signal at P*f.sub.2.

A matching network is a matching network of a power amplifier circuit that outputs a signal obtained by a differential amplifier amplifying power of a high-frequency signal. The matching network includes an input-side winding connected between differential outputs of the differential amplifier; an output-side winding that is coupled to the input-side winding via an electromagnetic field and whose one end is connected to a reference potential; a first LC series resonant circuit including a capacitive element and an inductive element connected in series with each other, and being connected in parallel with the input-side winding; and a second LC series resonant circuit including a capacitive element and an inductive element connected in series with each other, and being connected in parallel with the output-side winding.

A power amplifier module includes first and second amplifiers, a first bias circuit, and an adjusting circuit. The first amplifier amplifies a first signal. The second amplifier amplifies a second signal based on an output signal from the first amplifier. The first bias circuit supplies a bias current to the first amplifier via a current path on the basis of a bias drive signal. The adjusting circuit includes an adjusting transistor having first, second, and third terminals. A first voltage based on a power supply voltage is supplied to the first terminal. A second voltage based on the bias drive signal is supplied to the second terminal. The third terminal is connected to the current path. The adjusting circuit adjusts the bias current on the basis of the power supply voltage supplied to the first amplifier.

Apparatus and methods for a no-load-modulation power amplifier are described. No-load-modulation power amplifiers can comprise multiple amplifiers connected in parallel to amplify a signal that has been divided into parallel circuit branches. One of the amplifiers can operate as a main amplifier in a first amplification class and the remaining amplifiers can operate as peaking amplifiers in a second amplification class. The main amplifier can see essentially no modulation of its load between the power amplifier's fully-on and fully backed-off states. The power amplifiers can operate in symmetric and asymmetric modes. Improvements in bandwidth and drain efficiency over conventional Doherty amplifiers are obtained. Further improvements can be obtained by combining signals from the amplifiers with hybrid couplers.

An embodiment of a radio-frequency (RF) device includes at least one transistor, a package, and a surface-mountable capacitor. The package contains the at least one transistor and includes at least one termination. The surface-mountable capacitor is coupled in a shunt configuration between the at least one transistor and a power supply terminal of the device to decouple the at least one transistor from a power supply.

The invention relates to a sequential broadband Doherty power amplifier with adjustable output power back-off The sequential broadband Doherty power amplifier has at least one input (I.sub.1, I.sub.2; RF.sub.in) for receiving at least one broadband HF signal, wherein the broadband HF signal or broadband HF signals (RF.sub.in) have at least an average power level (carrier/average) and a peak envelope power level (peak), with the average power level and the peak envelope power level defining a crest factor, and a first amplifier branch for amplifying the input signal, with the first amplifier branch providing the amplification substantially for the low and at least the average power level, at least one second amplifier branch for amplifying the input signal, wherein the second amplifier branch substantially provides the amplification for the peak envelope power level, wherein the output of the first amplifier branch is connected via an impedance inverter (Z.sub.T) to the output of the second amplifier branch, the junction (CN) being connected to the load (Z.sub.0) in a substantially directly impedance-matched manner, wherein the first and the second amplifier branch each have a supply voltage, with at least one of the supply voltages being variable as a function of the crest factor of the signal to be amplified, and wherein the signal propagation delay through the at least two amplifier branches is substantially identical in the operating range.

A gate bias circuit for a plurality of GaAs amplifier stages is a transistor coupled to a temperature compensation current received from a CMOS control stage. A plurality of pHEMPT amplifier stages are coupled to the gate bias circuit and to a control voltage which switches the amplifier stage. A selectively controlled stage pass transistor enables a current mirror between the gate bias circuit and each stage amplifying transistor. The penultimate pHEMPT amplifier stage is coupled to a CMOS amplifier. A CMOS circuit provides both the temperature compensation current by a proportional to absolute temperature (PTAT) circuit and the control voltage enabling each pHEMPT transistor to receive its input signal in combination with the gate bias voltage.

A power amplifier circuit amplifies a radio-frequency signal in a transmit frequency band. The power amplifier circuit includes an amplifier, a bias circuit, and an impedance circuit. The amplifier amplifies power of a radio-frequency signal and outputs an amplified signal. The impedance circuit is connected between a signal input terminal of the amplifier and a bias-current output terminal of the bias circuit and has frequency characteristics in which attenuation is obtained in the transmit frequency band. The impedance circuit includes first and second impedance circuits. The first impedance circuit is connected to the signal input terminal. The second impedance circuit is connected between the first impedance circuit and the bias-current output terminal.